Series 20 – Episode 6 – The heart of the software-defined vehicle

Series 20 – Episode 6 – The heart of the software-defined vehicle Series 20 – Episode 6 – The heart of the software-defined vehicle
This entry is part 5 of 31 in the series Electronic Specifier Insights

Paige Hookway sat down with Nicola Concer, Head of Product Marketing for Automotive Processors at NXP Semiconductors, to discuss how NXP’s S32N processor family is designed to sit at the heart of the software-defined vehicle revolution.

The automotive industry is undergoing one of the biggest architectural shifts in its history. As cars evolve from predominantly mechanical machines into rolling computers, the focus is moving decisively towards software-defined vehicles (SDVs).

“Software-defined vehicles simply means a vehicle that can be updated and upgraded when it’s sold to the customer,” explained Concer. “When you buy an SDV car, that’s the youngest version of your car … it gets better and better over time.”

Traditionally, vehicles have relied on a distributed ECU (Electronic Control Unit) architecture, with dozens of small, dedicated controllers scattered throughout the car. That model is becoming unsustainable as feature complexity, connectivity, and safety requirements grow.

Concer described the industry’s move to centralised compute platforms, where a smaller number of powerful processors replace many discrete ECUs: “You need an architecture that has less ECUs, but rather a few larger compute engines that allow you to run multiple functions, multiple domains, in parallel.”

The benefits are both physical and digital. On the hardware side, OEMs can reduce wiring, weight, and cost. On the software side, centralised compute creates a unified foundation that makes it far easier to roll out new functions and updates over the lifetime of the vehicle – essential for an SDV strategy.

NXP is a major player in automotive semiconductors, with a broad portfolio of microcontrollers (MCUs) and microprocessors (MPUs). Concer’s product line focuses on the high‑end compute segment, where centralised vehicle computers and domain controllers live.

He positioned the S32N family as the next logical step, built on the success of earlier platforms such as S32Z and S32G. The S32G, originally launched as a gateway processor, quickly became an industry reference for early central compute concepts: “We launched it … it was an immense success for the company, but our customers asked for more consolidation … gateway plus body, or gateway plus motion, or even gateway plus ADAS functionalities.”

That growing demand for consolidation led to the S32G3, and ultimately to the S32N family, which fuses the gateway and real‑time compute capabilities into a higher‑end platform designed specifically for SDV architectures.

One of the focal points of the conversation was the S32N55, developed closely with a lead automotive customer. Its fundamental goal is aggressive consolidation of real‑time ECUs – pulling dozens of safety‑relevant controllers into a single high‑performance chip.

“The goal was a super integration and consolidation of dozens of real time ECUs,” said Concer. “The priority is high level of compute, high level of isolation, support for mixed criticality of execution… it’s really the replacement for real‑time ECUs today in one supercomputer.”

A critical enabler here is hardware‑enforced isolation. In a centralised compute environment, many different functions – some safety‑critical, some not – may share the same chip. They must not interfere with each other.

Building on the S32N55, the newly announced S32N7 pushes performance and flexibility further while keeping software largely compatible: “Most of the software for N55 is compatible to N7, so we released one software bundle to run both devices.”

Key advancements include:

  • Application cores for richer operating systems and faster software rollout
  • A much larger Ethernet switch to connect more zones in the vehicle
  • Powerful accelerators for intrusion detection, high‑throughput Ethernet processing, and AI workloads
  • An advanced PCIe capability (a ‘non‑transparent bridge’) enabling multiple masters – like autonomous driving systems and infotainment – to communicate efficiently and share storage or external accelerators

“It’s 10 times more efficient than Ethernet for software communication,” Concer noted, calling it “really the best technology for deploying high bandwidth communication inside a central SoC.”

The S32N platform doesn’t just power new features; it also lays the groundwork for new business models built on ongoing services and data.

With a safe, secure, and flexible central compute platform, automakers can:

  • Continuously deploy new functions and AI models to vehicles in the field
  • Introduce new paid features or subscriptions
  • Learn from real‑world usage to understand which features customers truly value – and redirect R&D investment accordingly

Combined with Agentic AI frameworks and natural‑language interfaces, Concer envisions cars that respond intuitively: “You can talk to the car and say, ‘Hey, it’s too hot in here,’ and the car will understand … close the window, start air conditioning, know that you like 20 degrees.”

Looking ahead five years, he predicts cheaper, smarter, continuously evolving vehicles: “You will have cars that learn, evolve around you. They get smarter because the OEMs can download to your car new sensor, new intelligence, new capabilities that were unthinkable before.”

NXP expects vehicles with the S32N7 to reach the market around 2028, helping make that vision real.

NXP’s S32N platform has already gained industry recognition, winning an Electronics Excellence Award at embedded world. Concer sees the award as vital third‑party validation, not only for automotive customers but also for adjacent markets such as drones, aircraft, and data centres, where similar compute and safety needs are emerging.

To hear more from NXP Semiconductors, you can listen to Electronic Specifier’s interview on Spotify or Apple podcasts.

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