Lattice Semiconductor Corporation today announced that an independent panel of judges has named the LatticeECP3 FPGA family a finalist in Elektra 2009, the European Electronics Industry Awards competition. The ECP3 family already has been honored as a finalist both in the EDN-China Innovation Awards and the e-Legacy Awards competition.

Lattice Semiconductor Corporation today announced the release of LCD-Pro, an advanced FPGA-based LCD video imaging and control solutions platform. Developed by Lattice partner Exor International, the LCD-Pro evaluation platform is based on the low-cost LatticeECP2 and LatticeXP2 FPGA devices, and the UltiLogic family of graphics Intellectual Property (IP) Cores from Exor International.

Lattice Semiconductor Corporation today announced that samples of the LatticeECP3-150 FPGA, the highest-density device in its high-value, low-power ECP3 mid-range FPGA family, are now generally available. Samples have already been shipping to select customers since July of this year.

Lattice Semiconductor today announced that its mid-range, low power LatticeECP3 FPGA family has been named a finalist in the highly regarded e-Legacy Awards competition sponsored by Electronic Product Design magazine. Lattice is one of six finalists for the coveted Environmental Design award, and is the only programmable logic company to be named a finalist in any of the competition's award categories.

Lattice Semiconductor has announced the immediate availability of Version 1.3 of its ispLEVER Classic design tool suite. Version 1.3 includes updated support for Lattice CPLDs (Complex Programmable Logic Devices), including the widely popular ispMACH 4000 device family. Designers can quickly download, for free, ispLEVER Classic for Windows, as well as optional Synopsys Synplify logic synthesis and Aldec Active-HDL simulator modules from: www.latt...

Lattice Semiconductor today announced financial results for the second quarter ended July 4, 2009. For the second quarter, revenue was $46.9 million, an increase of 8% from the $43.3 million reported in the prior quarter, and a decrease of 19% from the $58.1 million reported in the same quarter a year ago.

Lattice has announced the availability of a new 0.8-mm pitch 256-pin Chip-Array BGA (caBGA256) package for its popular MachXO PLD family that provides designers with a broader range of package options for implementing cost-sensitive, board space constrained designs. The Mach XO640, XO1200 and XO2280 devices are now available in the 14 x 14 mm, caBGA256 package with up to 211 user I/O. The new packages provide designers with 10% lower cost and 30%...