Lattice FPGA Family Named Finalist in e-Legacy Awards Competition

The Environmental Design award for which the LatticeECP3 FPGA family is a finalist recognizes energy-saving or fuel/power-efficient electronic design. Our ECP3 FPGA family was designed from the bottom up to be the lowest power SERDES-capable device in the industry without sacrificing the benefits of high speed serial I/O and processing capabilities, said Sean Riley, Lattice Corporate Vice President and General Manager of High Density Solutions. Being a finalist for the Environmental Design award is particularly gratifying because it reinforces what our customers have been telling us: that our ECP3 family offers an unprecedented combination of low power and high value.

Finalists were chosen by a panel of industry experts, and the winners will be selected by the readers of Electronic Product Design magazine, who are invited to vote via email, online and in print until November. Online voting is available at http://www.epdonthenet.net/awards_vote.aspx

We received a record number of entries this year, up by 12% on last year, said Esther Waite on behalf of Electronic Product Design magazine. The number of entries made the judges' job in picking the finalists particularly difficult. However, this has resulted in an excellent group of finalists in each category. Winners will be announced at the e-Legacy Awards luncheon at the Roof Gardens in Kensington, London on Wednesday, November the 4th.