New Package Option for Lattice MachXO PLD Family said to Reduce Cost and Board Area

22nd July 2009
ES Admin
Lattice has announced the availability of a new 0.8-mm pitch 256-pin Chip-Array BGA (caBGA256) package for its popular MachXO PLD family that provides designers with a broader range of package options for implementing cost-sensitive, board space constrained designs. The Mach XO640, XO1200 and XO2280 devices are now available in the 14 x 14 mm, caBGA256 package with up to 211 user I/O. The new packages provide designers with 10% lower cost and 30% reduction in board area than previously available on 1.0-mm pitch 256-pin Fine-Pitch Thin BGA (ftBGA256) packages.
Many of our customers who use MachXO devices in telecom infrastructure, server, industrial and consumer applications are increasingly adopting 0.8-mm pitch package technology, said Chris Fanning, Lattice Corporate Vice President and General Manager of Low-Density and Mixed Signal Solutions. The addition of the caBGA256 package to the MachXO PLD family provides designers with reduced cost and board area optimization options that are critical in high volume cost-sensitive applications.

Ideal for general purpose I/O expansion, control, bus bridging and power-up management functions in a wide range of low-density applications, the instant-on, easy-to-use MachXO PLD family offers users the benefits of increased system integration by providing embedded memory, built-in PLLs, high performance, flexible multi-voltage I/O, small footprint, remote field upgrade (TransFR™) technology and low power sleep mode, all in a single device.

We use MachXO PLDs in our Single Board Computer (SBC) product, which is used in a broad range of industrial applications. The MachXO PLDs give us the instant-on, flexible user I/O and single chip solution we need, said Arun Kumar, Project Lead at Mistral Solutions. The new caBGA256 package on three different MachXO logic densities provides us with a wider range of package choices and the migration flexibility to implement our board area constrained designs at a lower price.

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