In a recent episode of Electronic Specifier Insights, host Paige Hookway sat down with Maury Wood, VP of Strategic Marketing at Vicor, to unpack why traditional power architectures are struggling to keep up with AI, and how new approaches like 48V factorised power architecture could reshape the future of AI infrastructure.
From the outset, Wood framed the problem as a direct consequence of semiconductor and packaging innovation. AI processors have evolved from single dies to complex chiplet-based packages, integrating GPUs, high-bandwidth memory (HBM), and multiple communication interfaces on a single advanced substrate. As Wood explained: “These AI processors consume about half of the power coming into a data centre … all that is driving up the amount of low voltage current they need.”
This shift has pushed rack power levels into unprecedented territory. Traditional hyperscale racks that once operated below 100kW are being replaced by AI training racks drawing 500–600kW, with industry speculation pointing towards 1MW per rack in the coming years. That scale, multiplied across hundreds or thousands of racks, is forcing operators and designers to rethink everything from cabling to cooling.
For decades, the workhorse of on-board power conversion has been the multi-phase voltage regulator, typically stepping down from a 12V (and more recently 6V) intermediate bus to the sub-1V rails demanded by modern processors. But as GPU power climbs, this approach is hitting its limits.
Wood highlighted a key problem: dropping the intermediate bus voltage from 12 to 6V may seem like an incremental change, but it dramatically increases current – and therefore thermal losses: “As your voltage goes down, in order to provide the same level of power, the current goes up … you have a 6V intermediate bus feeding these processors that experiences a great deal of thermal losses as a function of the current squared.”
By contrast, Vicor advocates bringing 48V much closer to the point of load and then performing the final conversion to the low core voltage directly beneath the processor. Because power is the product of voltage and current, higher voltage means lower current for the same power – and lower current means far less heat in the distribution path. Wood notes that a 48V intermediate bus can have roughly 64 times lower thermal dissipation than a comparable 6V bus segment.
This is where factorised power architecture (FPA) comes in. Traditional multi-phase designs follow a “transform-then-regulate” model: 48V down to 6V, then multi-phase regulators feeding the processor. Vicor inverts that.
“In our case we do regulation and then transformation. We create a factorised bus … 48V, much lower thermal losses … and then you bring that 48V to a current multiplier … and at that point you transform from 48 to 1V to power the processor at the very high current, low voltage that it requires.”
The result is high current gain combined with high current density, delivered through very thin power modules mounted on the backside of the accelerator board. These thin packages, around 1.5mm thick vs. roughly 4-5mm for some multi-phase solutions, are not just more thermally agile – they’re also mechanically advantageous.
Because they’re so thin, they can be more easily integrated with backside liquid cooling, improving thermal management further. They also help operators increase compute density, by enabling thinner accelerator sleds and tighter rack packing:
“With a thinner AI accelerator tray … you have the opportunity to increase or decrease the spacing between sleds and drive up the compute density.”
The benefits extend upstream. Lower thermal losses at the 48V segment reduce the total power that must be delivered from the utility side, especially as data centres move from 48 to 800V distribution to minimise cable losses. That translates into better Power Utilisation Effectiveness (PUE) and lower operating expenses: “Those savings actually migrate upstream … when you then multiply those upstream savings by 10s of 1000s of GPUs … the savings in terms of electricity operating expense is very significantly lower with the approach that we’re advocating.”
Looking ahead, Wood expects power delivery to become an even more critical constraint as the industry moves towards wafer-scale and panel-scale processors with extreme integration density:
“The power delivery challenge is already daunting, and it’s going to get even more so into the future.”
Yet he views this as a historic opportunity for power electronics: “This is the most significant business opportunity for power electronics in the history of the industry … power electronics engineers have [never] faced anything like this before.”
In a world racing to scale AI, Vicor’s 48V factorised power architecture offers a compelling path to more efficient, denser, and cooler data centres – turning power delivery from a looming bottleneck into a key enabler of the next generation of AI infrastructure.
To hear more from Maury Wood, you can listen to Electronic Specifier’s interview on Spotify or Apple podcasts.
