Lauterbach supports the newest Arm Neoverse server processors

5th March 2024
Paige West

Lauterbach has extended the capabilities of its TRACE32 development tools to support all of Arm's latest Armv9-A server processors, including the Arm Neoverse V2, Arm Neoverse N2, and Arm Neoverse E2 processors.

This expansion enables developers to engage in simultaneous debugging of the CPU cores and non-intrusive CPU trace capture with TRACE32.

The Arm Neoverse V2 CPU is tailored for Cloud computing, high-performance computing (HPC), and machine learning (ML) applications. The Arm Neoverse N2, recognised as the first Armv9 infrastructure CPU, delivers a 40% increase in IPC performance compared to its predecessor, the Arm Neoverse N1, all the while maintaining good performance-per-watt efficiency. The Arm Neoverse E2 combines the high-efficiency Cortex-A510 CPU with the CMN-700 mesh for seamless backplane compatibility with N2 systems.

TRACE32 from Lauterbach enhances the development process by offering hardware-accelerated debugging and real-time tracing capabilities for the Arm Neoverse CPUs, alongside any other cores integrated by Arm licensees into their SoCs. The TRACE32 suite includes the universal PowerView software for debugging and tracing, as well as specialised debug and trace accelerator modules. Lauterbach's PowerDebug modules are engineered for rapid downloads and minimal response times, streamlining debugging and test automation processes. Meanwhile, the PowerTrace modules offer comprehensive insights into the activities of CPUs and other cores within an Armv9 system, without compromising its real-time performance, thereby facilitating quicker, safer, and more reliable market entry for embedded designs.

TRACE32 stands out for its ability to support simultaneous debugging and tracing of Arm Neoverse processors and additional cores within an SoC, covering the entire system whether it operates under SMP (Symmetric Multiprocessing), AMP (Asymmetric Multiprocessing), or iAMP (Integrated Asymmetric Multiprocessing) configurations. Lauterbach's iAMP debug and trace technology allows for the debugging of multicore systems with identical CPU instruction sets through a single TRACE32 PowerView GUI.

Norbert Weiss, Managing Director at Lauterbach GmbH, remarked: “Arm’s 2nd generation Neoverse CPUs offer server suppliers excellent computing performance and energy efficiency. With the latest support of our TRACE32 debug and trace tools for Neoverse E2, we have completed our offering for the entire Neoverse family."

This advancement empowers server developers to accelerate the development of applications on Armv9 SoCs featuring the 2nd generation Arm Neoverse CPUs V2, N2, and E2.

Attendees of embedded world 2024 can witness Lauterbach’s comprehensive support for Arm IP firsthand at booth 4-210.

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