Lattice Semiconductor introduces the ultra-low density MachXO3 Field Programmable Gate Array family, the world’s smallest, lowest-cost-per I/O programmable platform aimed at expanding system capabilities and bridging emerging connectivity interfaces using both parallel and serial I/O. By matching advanced, small-footprint packaging with on-chip resources, the MachXO3 family puts affordable innovation into the hands of system architects by simplifying the implementation of emerging connectivity interfaces such as MIPI, PCIe, GbE, and much more.
The ultra-low density MachXO3 FPGA family gives customers a single programmablebridge that lets them build differentiated systems using the latest components andinterface standards. With advanced package technology solutions that eliminate bondwires to enable lowest-cost and increased I/O density in a small footprint, the MachXO3family can be used across market segments, including consumer, communications,compute, storage, industrial and automotive.
Brent Przybus, Sr. Director, Product and Corporate Marketing, commented: “The MachXO3 family allows designers to address the disparity among the componentswithin their systems with minimal impact on cost, footprint, and power consumption. As systemperformance and complexity increases, I/O interfaces often become the bottleneck. Designers want to use the most advanced components, but have to deal with anynumber of interface standards, many of which are still evolving or are new to manydesigners, such as MIPI.”
Breakthrough Technology to Do More with Less
Lattice’s MachXO and MachXO2 families of instant-on, non-volatile programmabledevices have set the standard for providing system architects complete, low-costoptions to expand general purpose I/O, bridge interfaces and minimize total systempower.
Leveraging a low power architecture built on 40nm process technology to deliver lowercost with increased performance for power sensitive applications, the new MachXO3family delivers a new set of capabilities that enable system engineers to do even morein a smaller footprint.
The new 640-to-22K logic-cell family makes use of the latest in package technology tonot only deliver tiny 2.5x2.5mm wafer-level chip-scale packaging, but also 540 I/O countdevices, as well as devices with 3.125Gbps SERDES capabilities to cover the fullspectrum of bridging and interface requirements in consumer, industrial,communications, automotive, and compute markets.
Supported by Lattice Diamond software, as well as IP and application expertise bothin-house and by third parties, the MachXO3 FPGA family is a complete solution that delivers:
Pricing and availability
Details of the MachXO3 family are available today, with software availability and first production device shipments scheduled for the end of 2013 and pricing starting below $1.00 in high volume.