Synopsys has announced its ongoing close collaboration with TSMC to deliver robust EDA and IP solutions for TSMC's most advanced processes and advanced packaging technologies to accelerate AI chip design and 3D multi-die design innovation.

Synopsys has announced the next phase of its work with NVIDIA to accelerate chip design up to 30x with the NVIDIA Grace Blackwell platform.

Synopsys will host its annual flagship user group conference, SNUG Silicon Valley, 19-20th March 2025, at the Santa Clara Convention Center. This year, the first day of SNUG will also feature an inaugural, invite-only Synopsys Executive Forum.

Synopsys has announced the availability of Synopsys Virtualizer Native Execution on Arm-based hardware, transforming software development for Edge devices by substantially1 accelerating virtual prototype execution and deployment. This innovation delivers new, advanced capabilities that improve the productivity of engineering teams building software-defined products in the automotive, high-performance computing (HPC), and Internet of Thi...

Synopsys and Vector Informatik have announced a strategic collaboration to accelerate the automotive industry’s transformation to software-defined vehicles (SDVs).

Synopsys and SEMI Foundation announced signing a Memorandum of Understanding (MoU) at Synopsys' headquarters in California.

Synopsys announced the expansion of its hardware-assisted verification (HAV) portfolio with new HAPS prototyping and ZeBu emulation systems using the latest AMD Versal Premium VP1902 adaptive SoC.

The European Commission (EC) has approved Synopsys’ proposed acquisition of Ansys in Phase 1.

Synopsys and SiMa.ai have announced a strategic collaboration to jointly deliver a new solution for automotive companies to accelerate the development of workload-specific silicon and software needed to power artificial intelligence-enabled features in next-generation automobiles.

Synopsys has announced the industry's first Ultra Ethernet IP and UALink IP solutions, including controllers, PHYs, and verification IP, to meet the demand for standards-based, high-bandwidth, and low-latency HPC and AI accelerator interconnects.

Synopsys announces its continued, close collaboration with TSMC to deliver advanced EDA and IP solutions on TSMC's most advanced process and 3DFabric technologies to accelerate innovation for AI and multi-die designs.

Synopsys, has announced the launch of ImSym – Imaging System Simulator, a virtual prototyping platform for imaging systems, encompassing lenses, sensors, and image signal processors (ISPs).

Synopsys announces the availability of its production-ready multi-die reference flow, powered by Synopsys.ai EDA suite, and Synopsys IP for Intel Foundry's embedded multi-die interconnect bridge (EMIB) advanced packaging technology.

Synopsys has announced that its AI-driven digital design and analog design flows have achieved certification on Samsung Foundry's SF2 process with multiple test chip tapeouts.

Synopsys has announced that its AI-driven digital design and analog design flows have achieved certification on Samsung Foundry's SF2 process with multiple test chip tapeouts.

Synopsys, Inc. announced the industry's first complete PCIe 7.0 IP solution, consisting of a controller, IDE security module, PHY, and verification IP.

Synopsys announces it has entered into a definitive agreement with Clearlake Capital Group, L.P. ("Clearlake") and Francisco Partners, two global private equity firms, for the sale of its Software Integrity Group business in a transaction with a total value of up to $2.1 billion, including up to $475 million in cash payable upon Francisco Partners and Clearlake achieving a specified rate of return in connection with one or more liquidity transact...

Synopsys has announced that Samsung Electronics has achieved successful production tapeout for its high-performance mobile SoC design, including flagship CPUs and GPUs, with 300MHz higher performance using Synopsys.ai full stack AI-driven EDA suite and a broad portfolio of Synopsys IP on Samsung Foundry's latest Gate-All-Around (GAA) process technologies.

Synopsys has announced that it has completed the acquisition of Intrinsic ID, a provider of Physical Unclonable Function (PUF) IP used in the design of system-on-chips (SoCs).

In an era dominated by data-intensive AI workloads, Synopsys’ latest offering addresses the critical need for high-bandwidth, low-latency chips capable of processing vast amounts of data swiftly.