Synopsys has announced the details around two new collaboration agreements with NowSecure and Secure Code Warrior to expand its Software Integrity Group's portfolio of application security testing (AST) solutions.

Synopsys is unleashing a new wave of advanced designs with the industry's broadest portfolio of interface IP for the TSMC N3E process. 

Synopsys has announced its digital and custom design flows, powered by the Synopsys.ai full-stack AI-driven EDA suite, are certified for the Intel Foundry Services (IFS) Intel 16 process.

Responding to significant market growth in high-performance computing, AI, mobile and automotive applications, Synopsys has announced a collaboration with Samsung to develop optimised digital and custom design flows on Samsung Foundry's SF2 process.

Synopsys, Inc. announced an expanded agreement with Samsung Foundry to develop a broad portfolio of IP to reduce design risk and accelerate silicon success for automotive, mobile, high-performance computing (HPC) and multi-die designs.

Synopsys, has announced it has been named by Gartner as a Leader in the ‘Magic Quadrant for Application Security Testing’ for the seventh consecutive year.1

Synopsys has announced an agreement between its Software Integrity Group and ReversingLabs that provides software development and security teams with a comprehensive software supply chain risk management solution.

Accelerating the integration of heterogeneous dies to enable the next level of system scalability and functionality, Synopsys has strengthened its collaboration with TSMC and Ansys for multi-die system design and manufacturing. 

Synopsys has launched the ZeBu Server 5 emulation system to address software bring-up, power optimisation and debug challenges.

Synopsys has announced that Banias Labs achieved first-pass silicon success for its optical DSP SoC using Synopsys 112G Ethernet PHY IP and EDA Design Suite.

Synopsys has announced it will showcase the Fast Application Security Testing (fAST) offerings that represent the latest capabilities and features of the Polaris Software Integrity Platform at RSA Conference, 24—27 April 2023, in San Francisco.

At its annual Synopsys Users Group (SNUG) Silicon Valley Conference, Synopsys has launched Synopsys.ai, a suite of AI-driven solutions for the design, verification, testing and manufacturing of the most advanced digital and analogue chips.

Synopsys have announced the official countdown to the chip design sector's largest EDA user conference and the company's biggest global event of the year.

Synopsys have released the eighth edition of the Open Source Security and Risk Analysis (OSSRA) report. Produced by the Synopsys Cybersecurity Research Center (CyRC), the 2023 OSSRA report examines the results of more than 1,700 audits of commercial and proprietary codebases involved in merger and acquisition transactions and highlights trends in open source usage across 17 industries.

 Synopsys has released the 8th edition of the Open Source Security and Risk Analysis (OSSRA) report.

Synopsys reaches scale for AI-driven chip designs as major semiconductor customers register the first 100 commercial tape-outs with the company's award-winning Synopsys DSO.ai autonomous design system. Recent customers, including STMicroelectronics and SK hynix, have all seen significant uplifts in productivity and PPA, and are now charting a new design course using reinforcement learning-enabled design tools on cloud and on-premise.

Synopsys reaches scale for AI-driven chip designs as major semiconductor customers register the first 100 commercial tape-outs with the company's award-winning Synopsys DSO.ai autonomous design system.

Addressing the stringent performance and power demands of 5G/6G SoCs, Synopsys, Ansys and Keysight Technologies have announced the availability of their millimetre wave (mmWave) radio frequency (RF) design flow for TSMC's 16nm FinFET Compact (16FFC) technology.

Building on a long-standing collaboration with TSMC to drive continued innovation on advanced process nodes, Synopsys has announced several key achievements on the TSMC N3E process technology.

To boost productivity and enhance power, performance and area (PPA) of advanced electronic designs, Synopsys, Inc. has announced the breakthrough golden signoff ECO solution that addresses lengthy engineering design closure times.