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In-System Emulation Technology supports latest Infineon XC16x Processors

15th July 2009

ES Admin

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GOEPEL has developed a dedicated model library for the Infineon processor family, XC16x that supports the innovative emulation technology VarioTAP. The libraries, described as VarioTAP models, are structured modularly as intelligent IP and enable a complete fusion of Boundary Scan test and JTAG emulation. By employing this technology, embedded and external flash can be in-system programmed with the help of the processor function. Furthermore, VarioTAP supports interlaced Bus Emulation Tests (BET) and System Emulation Tests (SET) for extended JTAG/Boundary Scan functionality.

“The support of the latest Infineon processors, XC16x, has been demanded by our customers, in particular in the Automotive and Industrial Control industries. It’s another important step towards making VarioTAP efficiently available for all leading chip architectures”, explains Bettina Richter, GOEPEL electronic’s Marketing Manager.
“XC16x users can now implement innovative test strategies as mix of functional emulation tests, Boundary Scan and high-speed in-system programming on a consistent platform.”

The VarioTAP IP models for the Infineon processors XC16x (XC161/XC164/XC167) have been developed in tight cooperation with the Company Testonica, which recently joined the GATE™ partner program, and enable flash programming as well as a multitude of emulation test functions. They support all possible scan chain configurations from stand-alone operations, mixed modes with other JTAG devices including scan router implementations. The adaptive streaming technology of the TAP signals allows emulation tests to be executed in parallel or interactively with Boundary Scan tests within a test program, whereby the number of TAPs is unlimited. Using the hardware platform SCANFLEX, e.g. up to 8 TAP can be actuated independently from or simultaneously to other I/O resources. Regarding the Flash programming, besides embedded Flash also externally connected Flash are supported, with the script generation done automatically. In addition to dynamic tests of externally connected components such as RAMs or I/O resources, the IP functions for bus emulation and system emulation enable the functional test of on-chip interfaces as well as the execution of a customer defined program code.

The use of VarioTAP does not require expert background knowledge, additional development tools or processor-specific pods, which makes the handling easy and uncomplicated.

Due to the OEM cooperation with all leading vendors of In-Circuit Testers (ICT), Manufacturing Defect Analysers (MDA), Flying Probe Testers (FPT) and Functionality Testers (FT), the new solution is available for production with immediate effect.

The new VarioTAP IP models are supported as standard starting from SYSTEM CASCON version 4.5, and are activated by the licence manager like the system software. SYSTEM CASCON is a professional JTAG/Boundary Scan development environment, developed by GOEPEL electronic, with currently 40 completely integrated ISP, test, and debug tools. Regarding the hardware, VarioTAP is completely supported by the controllers of the ScanBooster family, as well as by the hardware platform SCANFLEX.