Micros

Cortus to show APS3 32 bit processor core at the Design Automation Conference 2011 (DAC), San Diego 6th-8th June

23rd May 2011
ES Admin
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Cortus S.A., the technology leader in ultra low power, silicon efficient 32-bit processor IP cores will be presenting their APS3 technology at the 48th Design Automation Conference in San Diego.
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The Design Automation Conference (DAC) exhibition runs from 6th - 8th June, at the San Diego Convention Center, is recognised as the world’s largest industry event for the design of electronic circuits and systems. This year’s conference has an increased emphasis on Embedded Software and Systems (ESS). Cortus S.A. will be exhibiting for the first time at DAC and will be located at Booth #1814. On the booth, Cortus will demonstrate their software tools for the APS3 processor core.



In addition, Dr Roddy Urquhart will present “Cortus APS3: Native 32 bit Performance…at 8 bit Cost” on Wednesday, June 8 from 10:30am to 11:00am, in the Embedded Theater, Hall F, Booth #1825.



The Cortus APS3 is a high performance 32-bit processor designed specifically for embedded systems. It features a tiny silicon footprint (the same size as an 8051), very low power consumption, high code density and high performance (up to 1.67 DMIPS/MHz). A full development environment is available, which can be customised and branded for customer use. The ecosystem around the APS3 is rich and well developed, it includes a full development environment (for C and C++), peripherals typical of embedded systems, bus bridges to ensure easy interfacing to other IP and system support and functions such as cache and memory management units. For the most demanding designs, the APS3 can be used in a multi-core configuration. The APS3 processor core is currently in volume production in a range of products from security applications to ultra low power RF designs.

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