Device delivers -156-dBFS noise floor over wide input range

The high performance input buffer and 16-bit A/D converter core provide the high linearity and noise performance necessary to detect and isolate weak signals in the presence of large signals, blockers, and spectral clutter. This can simplify the signal chain and move more of the system control, configuration, and tuning into the software domain. Target applications for the AD9652 include multi-mode, multi-band, communications receivers, RADAR, and RF test equipment.

The AD9652 supports input clock frequencies up to 1.24 GHz with an integer 1-to-8 clock divider used to generate the A/D converter sample clock. A duty cycle stabilizer is provided to compensate for variations in the A/D converter clock duty cycle. The 16-bit output data (with an over-range bit) from each A/D converter is interleaved onto a single LVDS output port along with a double-data-rate clock. Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.