Synopsys has announced a new capability in DFTMAX compression that significantly reduces the cost of test for designs and methodologies that mandate very few test pins. Extending Synopsys’ patented adaptive scan technology with a high-performance, low-pin interface to the tester allows designers to achieve predictable compression of up to 100X or more with only one pair of test data pins. As designers must maintain test quality and reduce test ...

Synopsys, Inc has announced the addition of the new DesignWare USB 2.0 picoPHY IP to its USB 2.0 PHY IP product line that has been successfully deployed in more than 300 customer designs, and in more than 50 different process technologies ranging from 180nm to 32nm. Targeted at mobile and high-volume consumer applications such as feature-rich smartphones, mobile internet devices and netbooks, the DesignWare USB 2.0 picoPHY supports advanced 28nm ...

Synopsys, Inc, a leader in software and IP for semiconductor design, verification and manufacturing, today announced the availability of its 40th audio codec IP with the release of the DesignWare 96 dB Hi-Fi Audio IP in the SMIC 65-nanometer (nm) process. Synopsys has been a leading provider of audio IP for more than twelve years and provides designers with high-quality audio IP solutions supporting 20 different process nodes, from 180-nanomenter...

Synopsys, Inc has announced that NVIDIA Corp. has adopted Synopsys' Yield Explorer solution for yield analysis and yield ramp. NVIDIA, which invented the graphics processing unit, selected Yield Explorer because of its ability to coherently combine and cross-correlate large volumes of data from the design, fab and test domains to quickly identify dominant failure mechanisms. This is accomplished through volume diagnostics based on TetraMAX ATPG ...

Synopsys, Inc. has announced the expansion of its verification collaboration with Freescale. The integration of complex hardware enabled by Moore’s law, IP, and embedded software content in modern devices is causing a rapid increase in verification complexity. Freescale and Synopsys have broadened their ongoing collaboration to manage this growing complexity. In addition to verification performance, efficiency, and methodology, the expanded col...

Synopsys, Inc. today announced that it has created an optimised reference implementation methodology for the ARM Cortex-A8 processor that achieves greater than 2GHz (4000 DMIPS) at 540mW. This result was accomplished by combining optimised methodology, tools and ARM Physical IP to enable new classes of mobile and tethered devices requiring the combination of high performance and energy efficiency.

Synopsys has introduced its Synphony HLS (High Level Synthesis) solution that integrates M-language and model-based synthesis to deliver up to 10X higher design and verification productivity than traditional RTL flows for communications and multimedia applications. Synphony HLS creates optimised RTL for ASIC and FPGA implementation, architecture exploration and rapid prototyping. In addition, Synphony HLS complements C/C++-based flows by generat...

Synopsys has announced that STMicroelectronics (ST) has achieved first-pass silicon success for its STM32 Connectivity Line of system-on-chips (SoCs) utilising the Synopsys DesignWare USB 2.0 On-The-Go (OTG) and Ethernet digital controllers. ST, a global leader in developing and delivering SoC and semiconductor solutions, evaluated several IP vendors and selected Synopsys DesignWare IP solutions because they are high-quality, include the right fe...

Synopsys has announced that the U.S. Department of Energy’s National Renewable Energy Laboratory (NREL), a leading government laboratory pursuing research in photovoltaic devices, has adopted Synopsys’ Sentaurus TCAD for simulating solar cell characteristics to improve performance.

Synopsys, Inc, a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that the Common Platform technology alliance, a unique technology collaboration between IBM, Chartered Semiconductor Manufacturing and Samsung Electronics, has qualified IC Validator for 32-nanometer (nm) process design rule checking on Common Platform technology. Synopsys and the Common Platform companies are continuing wi...

Synopsys has announced its new StarRC Custom parasitic extraction solution for analogue mixed-signal (AMS) and custom digital IC design. By combining the gold standard Star-RCXT extraction technologies and the Raphael NXT 3D fast field solver into a single, unified extraction solution, the StarRC Custom solution offers high performance runtime with tuned accuracy to meet the analysis demands of high sensitivity custom circuits.

Synopsys has announced that Sunplus Technology Co., Ltd, a leading provider of advanced IC solutions for home entertainment applications, has signed an expanded business agreement to establish Synopsys as its primary EDA partner. Under the new multi-year agreement, Sunplus has consolidated on Synopsys’ Galaxy Implementation and Discovery Verification Platforms for their chip development and design flows, and has extended its use of Synopsys Des...

Synopsys has announced that TSMC has adopted Synopsys’ HSIM hierarchical FastSPICE circuit simulator for its sub-40nm memory intellectual property (IP) characterisation flow. The HSIM simulator will be deployed for TSMC advanced SRAM compilers for timing, power simulation, dynamic IR drop and EM analysis, as well as for full-chip simulation with extracted package models. Using the latest version of the HSIM tool, TSMC is able to improve memory ...

Synopsys has announced that its DesignWare DDR3/2 PHY and digital controller IP supports the emerging 1866 and 2133 Megabits per second (Mbps) data rates currently being added to the JEDEC DDR3 standard. The DDR3/2 PHY also supports the anticipated Low Voltage DDR3L specification that runs at 1.35V, making the DesignWare IP ideal for power conscious designs where the change from 1.5V DDR3 to 1.35V DDR3L can reduce DRAM power consumption by up to ...

Synopsys has announced that Ubixum has used Synopsys’ Galaxy Custom Designer implementation solution to successfully design its latest advanced image sensor chip. The chip has been verified to be product-ready with first silicon. Custom Designer is a modern-era custom implementation solution that delivers superior ease-of-use and leverages Synopsys’ Galaxy Implementation Platform to provide a unified solution for custom and digital designs. T...

Synopsys today announced that Renesas Technology has adopted Synopsys' Proteus OPC for 45nm production. With the introduction of 45nm and below technologies, the demand for optical proximity correction (OPC) becomes greater due to design complexity and layer volume, making time to market and cost of ownership critical factors in OPC vendor selection. Proteus OPC is the industry’s most cost-effective solution since its highly scalable engine ru...

Synopsys has announced that the School of Electronics and Computer Science (ECS) at the University of Southampton is the first Western European university to receive the Charles Babbage Grant from Synopsys. Through the grant, ECS receives licenses of Synopsys' comprehensive electronic design automation (EDA) software and intellectual property. The grant also enabled the University to set up a brand new laboratory for virtual learning.

Synopsys has announced the broad availability of silicon-proven High-Definition Multimedia Interface (HDMI) transmitter and receiver digital controllers and PHY IP solutions as part of Synopsys’ DesignWare IP portfolio. Synopsys’ DesignWare IP for the HDMI interface is compliant to the standard specification and supports High-bandwidth Digital Content Protection (HDCP). Synopsys also provides a roadmap for HDMI 1.4 with product availability a...

Synopsys has introduced the latest release of its Galaxy Implementation Platform delivering 2x faster design implementation and signoff throughput with new multicore performance and multi-corner/multi-mode (MCMM) technologies. Built-in support for multicore processing across the Galaxy Platform enables engineering teams to immediately boost runtime performance using their existing compute servers. Additionally, the Galaxy Platform includes new MC...

In a move that addresses fundamental challenges in creating advanced systems-on-chips (SoCs), ARM, Chartered Semiconductor Manufacturing Ltd. , IBM, Samsung Electronics, Co., Ltd., and Synopsys, Inc. (Nasdaq: SNPS) today announced at the Design Automation Conference (DAC) an agreement to develop a comprehensive technology enablement solution for the design and manufacture of mobile Internet-optimized devices. The objective of this collaboration i...