Lattice Semiconductor Corporation today announced that it will be hosting a private hospitality meeting suite at the Consumer Electronics Show (CES) in Las Vegas January 10-13, 2012. The suite will be located in the Las Vegas Hilton, North Hall, 28th Floor, Suite 127.

Lattice Semiconductor Corporation today announced release 1.4 of its Lattice Diamond design software, the design environment for Lattice FPGA products. Users of Lattice Diamond 1.4 software will benefit from several usability enhancements that make FPGA design exploration easier and reduce time to market.

Lattice Semiconductor Corporation today announced release 6.2 of its PAC-Designer mixed signal design software, with updated support for Lattice’s Platform Manager, Power Manager II and ispClock devices. Users designing with Platform Manager devices now have more integrated access to the Lattice Diamond 1.4 software design environment, also announced today.

Lattice Semiconductor Corporation has announced it has entered into a definitive agreement to acquire SiliconBlue Technologies, a pioneer and leader in Custom Mobile Device solutions for the consumer handheld market. Utilizing a single chip, ultra-low power Field Programmable Gate Array (FPGA) fabric, SiliconBlue's mobileFPGA™ devices enable mobile designers to quickly add features to their mobile platform in areas such as connectivity, memory...

Lattice Semiconductor Corporation has redefined the low cost, low power mid-range FPGA market with its announcement of the next generation LatticeECP4 FPGA family, with 6 Gbps SERDES in low cost wire-bond packages, powerful DSP Blocks and hard IP-based Communication Engines for cost- and power-sensitive wireless, wireline, video, and computing markets.

Lattice Semiconductor Corporation has announced the immediate availability of a Sercos III real-time Ethernet solution. The low cost, low power LatticeECP3 FPGA-enabled Sercos III solution provides a low cost and flexible design alternative for real-time industrial networking applications. Sercos III is supported by Sercos International e.V., the worldwide user organization for Sercos technology. Sercos International is showcasing the LatticeE...

Lattice Semiconductor Corporation has announced that ABS GmbH, Jena, Germany, has chosen the mid-range LatticeECP3 FPGA for use in its compact digital camera reference design. “The LatticeECP3 FPGA gives us the capability to offer low cost, low power CCD or CMOS interface solutions for our customers.

Lattice Semiconductor Corporation has announced that Netezza is using the innovative programmable Lattice Power Manager device – the-- to integrate and simplify multiple power management functions in a board design. As board designs become ever more complex, the traditional approach to power management using multiple discrete power management ICs from several different vendors is no longer viable from a board cost, reliability and time to mark...

Lattice Semiconductor and Valens Semiconductor has announced a new and comprehensive HDBaseT camera reference design solution. The HDBaseT reference design is targeted at the surveillance market. Up to two cameras can be supported with the output being a HDBaseT CAT5 cable containing both uncompressed video streams. The HDBaseT reference design is powered from the power over Ethernet (POE) CAT5 cable. By offering the surveillance market a so...

Lattice Semiconductor Corporation today announced the immediate availability of its ispLEVER Classic version 1.5 design tool suite. This new Windows-based version is now available for download and licensing at no charge from the Lattice website, www.latticesemi.com/ispleverclassic. The comprehensive ispLEVER Classic 1.5 design software continues to support the ultra-low power ispMACH 4000ZE CPLD family as well as all of Lattice's mature programma...

Lattice Semiconductor Corporation has announced that, following the publication and widespread adoption of its Power 2 You guide to power management, Lattice is launching the worldwide Power 2 You Seminar Series in October 2011. The seminar will include comprehensive practical and technical presentations that combine basic design principles, advanced programmable power and platform management concepts, and real-world power and platform managemen...

Lattice Semiconductor Corporation has announced that it is now shipping samples of its MachXO2™ PLD family using a 2.5mmx2.5mm 25-ball Wafer Level Chip Scale Package (WLCSP). The MachXO2 devices now combine an extremely small footprint – until now unprecedented in the PLD market -- with the industry’s lowest power and most feature rich low density PLDs. Built on a low power 65nm process featuring embedded Flash technology, the MachXO2 fam...

Lattice Semiconductor has announced that XENTROTEC CO., LTD., Seoul, Korea, has chosen the mid-range LatticeECP3 FPGA for use in its digital video recorder (DVR) solution. XENTROTEC, which recently introduced its new multi-channel HD video multiplexer and HD digital video recorder solution at ISC WEST 2011, selected the LatticeECP3 FPGA over competing FPGAs and application-specific alternatives because the LatticeECP3 device’s built-in transce...

Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced release 1.3 of its Lattice Diamond® design software, the flagship design environment for Lattice FPGA products.

Lattice Semiconductor Corporation and Digi-Key Corporation today announced they have signed a global distribution agreement. Under the terms of the agreement, Digi-Key is authorized to sell Lattice's complete portfolio of innovative low power, low cost FPGA, PLD and programmable power management design solutions.

LatticeECP3 PCI Express IP Core Solution Enables Lowest Cost, Lowest Power Single-Chip Programmable PCI Express 2.0 Endpoints

Lattice Semiconductor Corporation has announced release 6.1 of its PAC-Designer® mixed signal design software, This integration of the PAC-Designer 6.1 and Diamond 1.3 design software tools will make more advanced digital design options available with Platform Manager products. An automated simulation environment, not previously available to Platform Manager designers, is a primary benefit of the design software integration.

Lattice Semiconductor Corporation has announced release 1.3 of its Lattice Diamond design software, the flagship design environment for Lattice FPGA products. Users of Lattice Diamond 1.3 software will benefit from major new features, including clock jitter analysis. Lattice Diamond 1.3 software is also now integrated with Lattice’s PAC-Designer 6.1 mixed signal design tools (also announced today), providing design support for Lattice’s pro...

Lattice Semiconductor announced that its LatticeECP3 FPGA family is compliant with the PCI Express 2.0 specification at 2.5Gbps. The LatticeECP3 FPGA and its PCI Express (PCIe) IP core passed PCI-SIG PCIe v2.0 compliance and interoperability testing for 1- and 4-lane configurations at a recent PCI-SIG workshop, ensuring that Lattice’s solution is interoperable with existing PCIe 2.0 supported systems. Achieving this significant industry miles...

Lattice ECP3 FPGA: Low Power, SERDES, DDR3, Cascadable DSP, Embedded Memory Blocks-- a Perfect Balance!