Industry’s first fully autonomous AI chip design engineer

Industry’s first fully autonomous AI chip design engineer Industry’s first fully autonomous AI chip design engineer

At Computex 2026, Cadence announced the industry’s first fully autonomous virtual agentic AI design engineer, extending the ChipStack AI Super Agent to Level 5 autonomy.

Built on Cadence’s AI-driven electronic design automation (EDA) portfolio with NVIDIA Nemotron models, and secured by NVIDIA OpenShell runtime, the new agentic capabilities enable customers to run dynamic simulations in automated workflows. At NVIDIA, 1,000s of engineers are using billions of compute hours per year to run millions of tests to verify their designs. Each engineer will use ChipStack agents to run hundreds of dynamic simulations with Cadence Xcelium Logic Simulation and Jasper Formal Verification, delivering over 40x faster RTL validation cycles and reducing a typical five-week verification loop to less than a day, dramatically accelerating the validation of complex semiconductor designs.

“We see our customers using AI to let their expert engineers take on more ambitious silicon designs with greater speed and confidence,” said Paul Cunningham, Senior Vice President and General Manager of the System Verification Group at Cadence. “With the ChipStack AI Super Agent, we’re taking the next step – moving from AI that assists engineers to autonomous virtual engineers that can implement real design and verification work, grounded in our signoff-accurate engines and running in secure, governed environments so teams can innovate faster with confidence.”

From AI assistance to autonomous engineering

The ChipStack AI Super Agent now operates at Level 5 autonomy, independently executing complex chip design and verification workflows while allowing engineers to inspect, guide and collaborate as needed. Native integration with collaboration environments and compatibility with tools like Codex or Claude Code, provides transparency into autonomous activity, helping teams stay connected to the system’s progress and decisions.

Rather than relying on step-by-step prompts, the ChipStack AI Super Agent evaluates intermediate results, determines next actions and iterates toward closure across tasks such as specification understanding, RTL generation, verification planning, formal analysis, simulation, debug, and design convergence. This shifts engineers from executing individual tasks to supervising outcomes and guiding intent, as autonomous verification workflows shrink validation cycles that traditionally took weeks down to less than a day in leading-edge deployments.

“Cadence’s approach to applying Agentic AI coupled with EDA represents a fundamental shift in how engineering teams scale in the face of a structural talent shortage,” Rob Knoth, Senior Group Director for Strategy and New Ventures told Electronic Specifier. “By automating the most time-intensive aspects of verification with ChipStack AI Super Agent, we free up engineers to focus on higher-value innovation. Junior engineers can ramp faster, while experienced teams can move up the stack to solve more complex design challenges. That combination is a true force multiplier for the industry.”

A key Cadence differentiator is that autonomous agent behaviour is tightly coupled with the company’s core physics-based design and verification engines. This keeps AI-directed actions grounded in proven computational models and signoff-accurate results, creating the trust needed for high-stakes engineering programs.

To support production deployment, the ChipStack AI Super Agent is run within the NVIDIA OpenShell runtime, a sandboxed environment for autonomous agents that enforces governance and helps protect sensitive IP through policy controls, isolation and managed access to tools, infrastructure and design data. Together, Cadence’s physics-based engines and OpenShell’s security architecture provide a practical path from supervised pilots to production-grade autonomous flows.

“As semiconductor designs grow more complex, engineering teams need AI agents that can accelerate verification without compromising security, control or trust,” said Timothy Costa, Vice President and General Manager of Computational Engineering at NVIDIA. “By securing Cadence’s ChipStack AI Super Agent with NVIDIA OpenShell and powering it with Nemotron models, Cadence is bringing governed autonomy to chip design workflows – giving customers a faster, more secure path to develop and validate advanced semiconductors.”

Availability

The Level 5 autonomous capabilities of the ChipStack AI Super Agent and the AgentStack orchestration framework are expected to be available to early-access customers in the second half of 2026.

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