The ISP programs mounted devices directly in the native environment, not as individual components before assembly. The new Version of the AFPG now also supports universal in-system programming of NAND flash devices, Phase Change Memories (PCM), OneNAND components, FPGA embedded instruments as well as connected processors, via Boundary Scan.
The AFPG tool provides a graphical definition of the command sequence, various possibilities for bad block handling, multi-site support and a corresponding block library with more than 1000 types which work perfectly together with the hardware integrated SPACE architecture. The new AFPG tool essentially allows cost and time advantages. In-system programming saves costs for socket adaption and external equipment.
Production logistics is simplified and storage costs can be reduced. High programming speed and an extremely high degree of automation also ensure time savings. Furthermore, ISP procedures can be openly combined with other testing and processing functions on one platform due to the architecture of SYSTEM CASCON. Using the appropriate SCANFLEX TAP transceiver, multiple boards can be programmed at the same time (SFX-TAP16/G up to 16 boards).