16-bit ADC Delivers 77dB SNR for High Performance Communications Systems & Instrumentation

The LTC2209 has two unique features that simplify receiver design and improve system performance. The first is an internal transparent dither circuit that improves the ADC's SFDR response well beyond 100dBc for low level input signals. The second feature is a digital output randomizer that dramatically reduces unwanted tones caused by digital feedback. The flexible digital outputs can be run as CMOS or LVDS.

The LTC2209 also features a programmable gain amplifier (PGA) front end that eases the ADC driver output power requirements when driving the lower input range of 1.5VP-P. This improves the distortion performance and power consumption of the driver with minimal impact on ADC noise performance.

The LTC2209 delivers an extensive feature set in a 9mm x 9mm QFN package, ensuring low power consumption of 1450mW without the need for heat sinking. Most importantly, total solution size with integrated bypass capacitance is less than half the nearest competitor and power consumption is equivalent to competitive parts sampling at half the speed. Designed for ease of use, the LTC2209 requires only a single 3.3V supply for operation and comes with a clock duty cycle stabilizer for maintaining the ADC's performance over varying duty cycles. The LTC2209 can accept high frequency, wide dynamic range signals, offering a wide analog input bandwidth of 700MHz.

The LTC2209 family includes speed grades of 160Msps, 130Msps, 105Msps, 80Msps, 65Msps, 40Msps, 25Msps and 10Msps, all with superior SFDR and SNR performance. In addition to the 16-bit LTC2209, the pin-compatible LTC2209-14 14-bit version is also available.