Avoiding premature failure of NAND Flash memory

Flash memory can be found these days nearly everywhere in modern IT technology and industrial electronics. It is used for example in high-performance servers, high availability storage clusters and very small industrial computers (embedded systems) and in modern consumer electronics devices. Correct functioning of these systems and the services they provide is often entirely dependent on whether the NAND flash memory which is used operates without errors. If the flash memory fails, then the respective application will also fail. This often has serious effects on the services provided or leads to considerably reduced functionality.

Even though flash memory is so-called “solid state” and functions without moving mechanical parts, flash memory storage wears out in practice as a result of write and erase cycles which take place during its normal, intended usage. In the data sheets from the manufacturers, the limited lifetime of flash memory resulting from write and delete cycles (P/E cycles, program/erase cycles) is often expressed with the parameter TBW (Terabytes written) or PTW (Petabytes written). Some manufacturers also quote the amount of data which can be written daily (GB written per day) for a specified duration or lifetime.

However, these parameters can only give you a rough point of reference when choosing suitable flash memory. They are not suitable for finding the best flash memory from the viewpoint of price and performance for a specific application. The data sheets cannot give a definite answer to the decisive and important question: “How long will the flash memory and/or the SSD last in practice?”. This is because the real lifetime is not only significantly affected by the specific write and erase scenario but also the temperature range with which the flash memory is operated. The lifetime is also affected by the structure size of the flash chips, the wear levelling strategy (unfortunately the wear levelling itself also “consumes” a significant number of P/E cycles), the internal design of the flash memory such as controller type, the type of cache and the actual firmware version etc.

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