Using the second generation ASMBL (Advanced Silicon Modular Block) column-based architecture, the Virtex-5Q family contains four distinct sub-families: the LX high-performance logic FPGA, the LXT high-performance FPGA with added connectivity, the digital signal processing optimised SXT, and the embedded processing optimised FXT.
In addition to the most advanced, high-performance logic fabric with up to 330,000 logic cells, Virtex-5Q FPGAs contain many hard-IP system level blocks, including powerful 36-Kbit block RAM/FIFOs, second generation 25×18 DSP slices, SelectIO technology with built-in digitally-controlled impedance, ChipSync source-synchronous interface blocks, system monitor functionality, enhanced clock management tiles with integrated DCM (Digital Clock Managers) and phase-locked-loop (PLL) clock generators, and advanced configuration options. Additional device-dependant features include power-optimised high-speed serial transceiver blocks for enhanced serial connectivity, PCIExpress compliant integrated Endpoint blocks, tri-mode Ethernet MACs (Media Access Controllers), and high-performance PowerPC440 microprocessor embedded blocks.
The Virtex-5Q LX, LXT, SXT, and FXT FPGAs also include advanced high-speed serial connectivity and link/transaction layer capability.