The workshop entitled, “Designing in Reliability by Assessing Contamination at the Component Interface,” will address how gaining a better understanding of no-clean residues, their potential to cause leakage, and test methods for quantifying risk will help reliability engineers understand how clean is clean enough to meet reliability requirements.
Additionally, during his presentation entitled, “Why Clean No-Clean Flux,” Dr Bixenman will discuss how understanding cleanliness data becomes more challenging as circuit assemblies increase in density. A new site specific method has been designed to run performance qualifications on boards built with specific soldering materials, reflow settings and cleaning methods.