FPGAs

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How to migrate custom logic from an FPGA to MCUs

How to migrate custom logic from an FPGA to MCUs
Just like a CPLD or FPGA, CLB is composed of programmable logic primitives that can be configured in many ways to implement custom blocks of logic. Instead of using VHDL or Verilog to configure these logic primitives, CLB is programmed with a GUI-based SysConfig tool and function calls. Since the configuration method is different, the CLB is technically not a CPLD or FPGA, but it can be used to achieve identical results.
10th January 2020

FPGA board facilitates large buffer sizes

FPGA board facilitates large buffer sizes
VadaTech has announced the AMC573, which utilises the Xilinx XCZU28DR RFSoC and is compliant to AMC.1, AMC.2, AMC.3 and AMC.4 specifications. It has an onboard, re-configurable FPGA which interfaces directly to the AMC FCLKA, TCLKA-D. The module has two banks of 64-bit wide DDR4 memory with ECC (16 GB in total). This allows for large buffer sizes to be stored during processing as well as for queueing the data to the host.
6th January 2020

FPGA platform enables low power edge applications

FPGA platform enables low power edge applications
Lattice Semiconductor has announced its new low power FPGA platform, Lattice Nexus. The platform is architected to deliver power-efficient performance that will benefit developers of a wide range of applications, including AI for IoT, video, hardware security, embedded vision, 5G infrastructure and industrial/automotive automation.
17th December 2019


FPGAs bring power edge AI applications

FPGAs bring power edge AI applications
Lattice Semiconductor has announced an FPGA developed on its new Lattice Nexus FPGA platform, CrossLink-NX. This new FPGA provides the low power, small form factor, reliability, and performance that developers need to create innovative embedded vision and AI solutions for communications, compute, industrial, automotive, and consumer systems.
13th December 2019

Accelerating FPGA design with new software

Accelerating FPGA design with new software
Lattice Semiconductor has announced the availability of the latest version of its popular software design tool for FPGAs, Lattice Radiant 2.0. In addition to adding support for higher density devices like the new CrossLink-NX FPGA family, the updated design tool also offers new features that make it faster and easier than ever to develop Lattice FPGA-based designs.
11th December 2019

FPGAs designed to support Intel Ultra Path Interconnect

FPGAs designed to support Intel Ultra Path Interconnect
Intel has announced shipments of new Intel Stratix 10 DX field programmable gate arrays (FPGA). The new FPGAs are designed to support Intel Ultra Path Interconnect (Intel UPI), PCI-Express (PCIe) Gen4 x16, and a new controller for Intel Optane memory to provide flexible, high performance acceleration. VMware is one of many early access program participants.
11th December 2019

Dual FMC+ Carrier with Xilinx Zynq UltraScale+ FPGA

Dual FMC+ Carrier with Xilinx Zynq UltraScale+ FPGA
VadaTech has announced the AMC560. The AMC560 is an AMC FPGA Carrier with dual FMC+ (VITA 57.4) interfaces and is compliant to AMC.1, AMC.2, AMC.3 and AMC.4 specifications. The unit has a Xilinx UltraScale+ XCZU19EG MPSoC FPGA that provides 1,968 DSP Slices and 1,143k logic cells. 
11th December 2019

ASIC design prototype time cut with automatic partitioning tool

ASIC design prototype time cut with automatic partitioning tool
Aldec has introduced automatic FPGA partitioning to its popular HES-DVM; the company’s fully automated and scalable hybrid verification environment for SoC and ASIC designs. Traditionally, the manual partitioning of multiple FPGAs used for prototyping can take days, or even weeks, whereas the automation in HES-DVM can perform the task in minutes; ideal for exploratory, What-If scenarios.
20th November 2019

Software radio board with backplane optical added to FPGAs

Software radio board with backplane optical added to FPGAs
Pentek has introduced the newest member of the Jade family of high-performance 3U VPX boards. The Model 54821 is based on the Xilinx Kintex Ultrascale FPGA and features three 200 MHz 16-bit A/Ds with three programmable multiband digital downconverters (DDCs) and one digital upconverter (DUC) with two 800 MHz 16-bit D/As.
15th October 2019

FPGAs enhance video bridging for MIPI-based embedded vision systems

FPGAs enhance video bridging for MIPI-based embedded vision systems
Lattice Semiconductor has introduced the CrossLinkPlus FPGA family for MIPI D-PHY based embedded vision systems. CrossLinkPlus devices are innovative, low power FPGAs featuring integrated flash memory, a hardened MIPI D-PHY and high-speed I/Os for instant-on panel display performance, and flexible on-device programming capabilities.
10th October 2019


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