Test & Measurement

Module enables error-free measurement of PAM4 signals at 116Gbit/s

7th November 2019
Mick Elliott

The PAM4 Error Detector (ED) is a new module for the Anritsu Signal Quality Analyser-R MP1900A series. It achieves error-free measurement of PAM4 signals at 116Gbit/s. Combined with the previously released MP1900A series PAM4 Pattern Generator, the new module supports high-accuracy BER measurements of PAM4 signals.

 

With the spread of next generation 5G mobile communications and Cloud services, data communications traffic is expected to increase exponentially.

In addition, data centres supporting rapid transmission of large volumes of traffic are switching to the 400GbE*3 communications standard using the 53.125-Gbaud PAM4 x 4 lane method and are also investigating a future switch to 800GbE*4 using eight lanes.

Since the PAM4 method representing data with four amplitude levels has gaps between signal levels just a third that of the two-level NRZ method, measuring instruments for evaluating signal quality need a much higher input sensitivity than previous models.

In addition to high speeds, the impact of transmission path losses in printed circuit boards, cables, components, etc., on measurement results cannot be ignored.

Evaluating the genuine performance of the measured product not only requires excellent fundamental performance, such as sensitivity and bandwidth, but also requires a highly integrated solution with functions such as clock recovery and an equaliser for correcting loss effects.

To meet these needs, Anritsu has developed this ED with built-in clock recovery and equaliser to implement a PAM4 BER measuring instrument with market-leading high performance.

The Signal Quality Analyser-R MP1900A is a bit error rate tester for communications speeds of 400G and faster, supporting high-speed signal generation and signal performance analysis.

With a built-in high-bandwidth and high-input-sensitivity Rx circuit, the newly released PAM4 ED MU196040B module supports error-free measurement of 100-Gbit/s PAM4 input signals even at a low input amplitude of just 36mV typ. Furthermore, the built-in clock-recovery and equaliser functions support highly reproducible jitter and ISI stress tests of transceiver input circuits using an easily configured equipment setup.

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