The DRV870x-Q1 family of devices drives both high-side and low-side FETs with a 10.5-V VGS gate drive. The gate-drive current for all external FETs is configurable with a single external resistor or through the serial peripheral interface (SPI).
A low-power sleep mode is provided which shuts down internal circuitry to achieve a very-low quiescent-current draw.
Features
AEC-Q100 Qualified for Automotive Applications
Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature
Single H-Bridge Gate Driver
Drives Four External N-Channel MOSFETs
Supports 100% PWM Duty Cycle
5.5- to 45-V Operating Supply-Voltage Range
Three Control-Interface Options
PH/EN, Independent H-Bridge, and PWM
Serial Interface for Configuration (DRV8703-Q1)
Adjustable Gate Drive For Slew-Rate Control
Independent Control of Each H-Bridge
Supports 1.8-V, 3.3-V, and 5-V logic inputs
Current-Shunt Amplifier
Integrated PWM Current Regulation
Low-Power Sleep Mode
Small Package and Footprint
32-Pin VQFN
5mm × 5mm
Wettable Flanks Package
Protection Features
Supply Undervoltage Lockout (UVLO)
Charge-Pump Undervoltage (CPUV) Lockout
Overcurrent Protection (OCP)
Gate-Driver Fault (GDF)
Thermal Shutdown (TSD)
Watchdog Timer (DRV8703-Q1)
Fault-Condition Output (nFAULT)