Design
Xilinx Improves Design Flow for Industry's Only Proven Partial Reconfiguration FPGA Technology with ISE Design Suite 12.2
Xilinx announced the availability of its fourth generation partial reconfiguration design flow and new improvements to its intelligent clock gating technology that deliver a 24 percent reduction in dynamic block-RAM (BRAM) power consumption in Virtex(R)-6 FPGA designs. Designers can download ISE(R) Design Suite 12.2 today to take advantage of an easier-to-use, intuitive partial reconfiguration design flow as well as take further steps to reduce p...
Fujitsu Adopts Cadence Encounter Conformal ECO Designer
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Fujitsu Limited has adopted the Cadence® Encounter® Conformal® ECO Designer to cut costs and reduce design time in its engineering change order (ECO) implementation flow. The technology giant recently deployed the Cadence technology to tape out a network-control large-scale integration design of 40 million gates at a 65-nanometer ...
Realtek Semiconductor Selects Cadence Design Systems as its Strategic EDA Solutions Provider
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, announced today that it has signed an agreement with Realtek Semiconductor Corp., a leading IC design house in Taiwan, that establishes Cadence as Realtek's strategic electronic design automation (EDA) solutions provider.
Improved Workflow Integration for Electromagnetic Simulation of EMC Applications
Computer Simulation Technology (CST), a world leader in the computer simulation of radiated emissions and susceptibility, announces major workflow improvements for EMC simulation at IEEE EMC 2010. CST’s complete technology for 3D EM simulation will be further enhanced by tighter integration of CST CABLE STUDIO™ (CST CS) and the CST MICROWAVE STUDIO® (CST MWS) TLM solver in CST STUDIO SUITE™ 2011.
CST STUDIO SUITE 2011 Improved Workflow Integration for Electromagnetic Simulation of EMC Applications in
Computer Simulation Technology (CST), a world leader in the computer simulation of radiated emissions and susceptibility, announces major workflow improvements for EMC simulation at IEEE EMC 2010. CST’s complete technology for 3D EM simulation will be further enhanced by tighter integration of CST CABLE STUDIO™ (CST CS) and the CST MICROWAVE STUDIO® (CST MWS) TLM solver in CST STUDIO SUITE™ 2011.
Synopsys and GLOBALFOUNDRIES to develop DesignWare interface PHY IP for 28nanometer technologies
Synopsys and GLOBALFOUNDRIES, a leading provider of advanced semiconductor technology and manufacturing services, today announced an agreement to develop the Synopsys DesignWare SuperSpeed USB (3.0), USB 2.0, HDMI 1.4 Tx and Rx, DDR3/2, PCI Express(r) 2.0 and 1.1, SATA 1.5/3 Gbps and 6 Gbps, and XAUI PHY IP for GLOBALFOUNDRIES’ 28 nanometer (nm) “Gate First” High-k Metal Gate (HKMG) process technologies. The collaboration will enable mut...
Agilent Technologies' Advanced Design System Selected by Putnam RF for High-Power, Broadband RF Product Development
Agilent Technologies Inc. (NYSE: A) today announced that its Advanced Design System (ADS) software has been selected by Putnam RF Components Inc. for use in development of high-power, broadband radio frequency products. Putnam RF is an industry leader in the development of high-power, broadband RF solutions found primarily in military communications and countermeasure systems.
New-Generation Microprocessor from STMicroelectronics Targets High-Performance Connectivity and Embedded Applications
STMicroelectronics today introduced the industry’s first embedded microprocessor that couples two ARM Cortex-A9 cores with a DDR3 (Third-generation double-data rate) memory interface. Manufactured in ST’s low-power 55nm HCMOS (high-speed CMOS) process technology, the SPEAr1310 delivers high computing power and customizability for multiple embedded applications together with the high level of cost competitiveness offered by system-on-chip devi...
NI LabVIEW 2010 Optimises Compiler for Faster Code Execution
National Instruments announced LabVIEW 2010, the latest version of the graphical programming environment for design, test, measurement and control applications. LabVIEW 2010 delivers time savings with new features such as off-the-shelf compiler technologies that execute code an average of 20 percent faster and a comprehensive marketplace for evaluating and purchasing add-on toolkits for easily integrating custom functionality into the platform...
Lantronix furthers its commitment to Linux
Lantronix has announced the worldwide availability of the EDS1100 and EDS2100 Linux software development kit (SDK).