Directed Self-Assembly process results presented at SPIE

Additionally, the partners have developed a DSA solution for a via patterning process compatible with the 7nm technology node. Furthermore, imec has developed a chemo-epitaxy flow for 30nm and 45nm pitch hexagonal holes patterning using a single 193nm immersion exposure, envisioning DSA patterning for the storage-node for DRAM applications.

Reducing defectivity in DSA and improving patterning reliability is one of the main roadblocks to creating an industrially-viable DSA patterning process to push 193nm immersion litho beyond its current limits. Imec and its partners, Merck and Tokyo Electron, have made significant progress on this aspect, achieving defectivity values of 24 defects/cm2.

The partners also achieved breakthroughs in two other barriers in the development of DSA patterning solutions. First, decomposition of an N7 compatible via layer was achieved. This required a novel templated DSA process with polystyrene-wetting sidewalls of the template pre-pattern. This process allows users to significantly reduce the critical dimension (CD) of the template, in comparison to using a conventional polymethylmetacrylate-wetting scheme. Second, an etch process has been developed to transfer the small vias (~15nm CD) into the underlying hard mask with excellent open hole rate.

Furthermore, imec has developed a chemo-epitaxy flow for the patterning of highly dense 45nm pitch hexagonal hole arrays. The process paves the way to single patterning 193nm immersion lithography in DRAM applications. Cost is crucial in standalone memory, and DRAM scaling will heavily rely on advanced patterning techniques enabling storage node pitch less than or equal to 45nm with a minimal number of steps for D14 and beyond.

“Over the past few years, we have realised a reduction of DSA defectivity by a factor 10 every six months,” commented An Steegen, Senior Vice President, Process Technologies, imec. “Together, with Merck and Tokyo Electron, providing state-of-the-art DSA materials and processing equipment, we are looking ahead at two different promising DSA processes that will further improve defectivity values in the coming months. Our processes show the potential to achieve single-digit defectivity values in the near future without any technical roadblocks lying ahead.”

“In today’s consolidating semiconductor landscape, equipment and material suppliers are playing a key role in tackling the scaling challenges and accelerating technology advancements. Our progress on DSA process development is a testament to this, and the result of a deeply concentrated collaboration with Tokyo Electron and Merck, providing the advanced process tooling and materials knowledge paramount to achieve these breakthroughs.” added Steegen. “As an answer to the evolutions in the industry, we are setting up a supplier hub, aiming to offer a neutral, open innovation R&D platform that closely involves suppliers at an early process step and module development stage and allows for efficient cost sharing, minimised risk and optimised return on investment for all in the semiconductor ecosystem. Following recent announcements concerning imec’s equipment supplier hub, which has already resulted in research acceleration, we are now increasing our efforts to build a material supplier hub, which will be a focus in 2015.”