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Stacked dies to connect with test equipment
It has been announced by imec that the IEEE Std 1838TM-2019, recently approved by the IEEE Standards Association, will be included in IEEE Xplore Digital Library from February 2020 onward. The new standard allows die makers to design dies which, if compliant to this standard, constitute, once stacked in a 3D-IC by a stack integrator, a consistent stack-level test access architecture.
Chip-based technology for third generation DNA synthesis platform
EVONETIX, the synthetic biology company developing a desktop platform for scalable, high-fidelity and rapid gene synthesis, has announced it has partnered with research and innovation hub, imec, active in the fields of nanoelectronics and digital technologies, to increase production of Evonetix’s proprietary microelectromechanical systems (MEMS)-based silicon chips, enabling the platform to be manufactured at a commercial scale.
Built-in sensors warn firefighters of too much heat
Imec, Ghent University, Brigade de Sapeurs-Pompiers de Paris, Connect Group and Sioen, have presented a prototype of new protective firefighters’ clothing with integrated temperature sensors and electronics to warn firefighters of too high ambient temperatures. The new protective sensing suit, that was developed within the framework of the Flemish I-CART project, was successfully tested at high temperatures. It should significantly reduce t...
Scalable devices on Si targeting beyond 5G RF front-end modules
Imec has presented a functional GaAs-based heterojunction bipolar transistor (HBT) devices on 300mm Si, and CMOS-compatible GaN-based devices on 200mm Si for mm-wave applications. The results demonstrate the potential of both III-V-on-Si and GaN-on-Si as CMOS-compatible technologies for enabling RF front-end modules for beyond 5G applications. They were presented at last year’s IEDM conference.
Paving the way to extreme scaling for logic and memory transistors
At this year’s IEEE International Electron Devices Meeting, imec, reported an in-depth study of scaled transistors with MoS2 and demonstrated best device performance to date for such materials. MoS2 is a 2D material, meaning that it can be grown in stable form with nearly atomic thickness and atomic precision. Imec synthesised the material down to monolayer (0.6nm thickness) and fabricated devices with scaled contact and channel length...
Image sensor designed for SWIR range with record pixel density
Imec presents a new thin-film monolithic image sensor that captures light in the near-infrared (NIR) and short-wavelength infrared (SWIR). Based on a monolithic approach, the process promises an order of magnitude gain in fabrication throughput and cost compared to processing today’s conventional IR imagers, while at the same time enabling multi-megapixel resolution.
Next-generation yield-simulation software for solar parks
At the European Photovoltaic Solar Energy Conference (EU PVSEC) in Marseille (France), Imec and EnergyVille, together with PVcase, presented their partnership to develop a commercial software solution that allows to easily design and accurately predict the energy yield of brand new photovoltaic (PV) power plants.
How do you get a server rack in your back pocket?
imec has presented TEMPO: a cross-border collaboration between 19 research and industrial partners, funded by ECSEL Joint Undertaking which supports public-private partnerships in the EU. The three-year program aims at developing process technology and hardware platforms leveraging emerging memory technologies for neuromorphic computing for future applications in mobile devices that need complex machine-learning algorithms.
Doubles energy density of solid-state batteries
At the European Electric Vehicle Batteries Summit, imec and partner in EnergyVille, announced a solid-state Li-metal battery cell with an unsurpassed energy density of 400 Wh/litre at a charging speed of 0.5C (2 hours). Imec have also started to upscale the materials and processes in a pilot line for fabrication of solid-state pouch cells at the EnergyVille Campus in Genk and is set-up in collaboration with the University of Hasselt.
Solar cell achieves high front side conversion efficiency
At SiliconPV 2019, research and innovation hub, imec, announced that its n-PERT (Passivated Emitter and Rear Totally diffused) solar cells developed with Jolywood, have reached a certified front-side conversion efficiency of 23.2%. With cost-efficient processing and a clear path to higher efficiencies, this makes these n-PERT cells a serious contender to p-PERC technology.
Grant received to develop ultra-bright thin-film light sources
The European Research Council has awarded an advanced grant to Paul Heremans, Fellow and Director Large Area Electronics at imec. Paul Heremans will receive €2.5m for a five year project to develop ultra-bright thin-film light sources and lasers, a technology with a wide variety of applications, such as optical interconnects, augmented reality displays and lidar sensors.
Miniature microfluidics heat sink for high-performance chip cooling
At the embedded world Conference 2019, imec presented a silicon-based compact microchannel heat sink that enables high heat flux dissipation. The imec heat sink assembled to a high performance chip for cooling the latter one achieves a low total thermal resistance of 0,34K/W to 0.28K/W at less than two watt pump power.
Sub-mW radar designed for presence detection in smart buildings
This week at the 2019 International Solid-State Circuits Conference (ISSCC2019), imec will be announcing its radar transceiver designed as an efficient, low cost solution for presence detection in smart building solutions. The power consumption of the radar is below 1mW, which is 100 times lower than other solutions, and is capable of detecting even micro-movements from human respiration, up to a distance of 15 metres.
Ringamp ADCs for 5G base stations and mobile handsets
At the 2019 International Solid-State Circuits Conference (ISSCC2019), imec, a research and innovation hub in nanoelectronics and digital technologies, will present a compact, highly linear 3.2 giga-sample-per-second (GSps) RF-sampling ADC that uses ring amplification (ringamp).
Accurately determine energy yield of bifacial solar modules
Research and innovation hub in nanoelectronics, energy and digital technologies, imec, along with EnergyVille have presented a new simulation framework that can reportedly accurately calculate the energy yield of bifacial PV systems (also capturing reflected light from the ground).
Photonic-based medical device for the screening of arterial stiffness
The research and innovation hub, Imec, and Ghent University, alongside Medtronic and other CARDIS project partners, have developed a prototype medical device based on silicon photonics for the screening of arterial stiffness and for the diagnosis of cardiovascular diseases such as arterial stenosis and heart failure.
Health patch with long battery life to measure vital signs
At the Consumer Electronics Show (CES 2019), in Las Vegas, imec and TNO are presenting the latest version of their health patch. Developed in the framework of the Holst Centre in Eindhoven, the new health patch offers comfort and a long battery life. It can also be manufactured at a fraction of the cost of previous generations, making it a user-friendly, disposable solution for ambulant patient monitoring.
Europe secures Europractice services to academia and industry
The and innovation hub in nanoelectronics and digital technologies, Imec, and its partners STFC-UKRI, Fraunhofer IIS, CMP and Tyndall, have announced that Europractice was selected and granted European funding as a H2020 project. This new funding secures the Europractice services to European universities, research institutes and industry until the end of 2021.
Stacked nanowire gate-all-around transistors for N3 and beyond
At this week’s 2018 IEEE International Electron Devices Meeting (IEDM), imec, the research and innovation hub in nano-electronics and digital technology, reported significant progress in process enabling the introduction of gate-all-around (GAA) transistors with vertically stacked nanowires and nanosheets for the N3 technology node.
Stack FinFETS with 45nm fin pitch using sequential 3D integration
At the IEEE IEDM 2018 conference, imec, the research and innovation hub in nanoelectronics and digital technologies, presented a demonstration of 3D stacked FinFETs on 300mm wafers using a sequential integration approach with a 45nm fin pitch and 110nm poly pitch technology.