Analysis
Micron Technology Sponsors Linley Tech Processor Conference
Micron's Chris Johnson, Global DRAM Application Engineering Manager, presents High Performance Memories for Packet Processing: Solutions and Outlook. On October 10 at 1:20 p.m. Micron is presenting a session on the future of memory technology for networking applications. The performance gap is widening between what commodity DRAM offers and the requirements of packet processing. Technologies discussed are targeted at next-generation high performance networking applications. Topics include: low latency memories, hybrid memories and the status of breakthrough technologies enabling new generations of memory solutions.
The At the Linley Tech Processor Conference, thought leadership, plus keynote addresses and Q&A panels give attendees the critical information they need to select the best processor and memory technology for their designs, said Joseph Byrne, Linley Group senior analyst and conference chairperson. Micron's participation at Linley this year underscores their importance as an innovator and design collaborator in the high-performance networking arena.
The Linley Tech Processor Conference takes place at the DoubleTree Hotel in San Jose, California on the 10th and 11th of October 2012.
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