Synopsys and TowerJazz have revealed that they have qualified Synopsys' unified mixed-signal IC design solution for TowerJazz's power management analog/mixed-signal reference design flow (Reference Flow 2.0) and 180-nanometer Power Management interoperable process design kit. Synopsys' tool suite, the foundry iPDK and reference design flow are verified to seamlessly work together to enable designers to quickly become productive.

Synopsys have today revealed the availability of the 2012.06 release of its IC Compiler software, featuring multiple advances to support giga-performance design. IC Compiler has been addressing the productivity and manufacturability challenges inherent in giga-performance design through smarter optimization, faster design convergence and advanced process node support.

Synopsys announced that its industry-first PCI Express controller IP with support for low-power sub-states has successfully taped out in multiple designs. The addition of the L1.1 (snooze) and L1.2 (off) sub-states to Synopsys' DesignWare controller IP for PCI Express 1.0, 2.0 and 3.0 enables designers to reduce power consumption in key market segments, including camera, card reader, networking and wireless applications serving the ultrabook and ...

Electronics continue to infiltrate all aspects of automotive design as consumer demand for safety, performance, fuel efficiency, and reliability continues to grow. Automotive companies face pressure not only for advanced functions and performance, but also from the rising cost of warranty issues, supply-chain management, intense competition, and compressed market windows.

SaberRD is an intuitive, integrated environment for designing and analyzing power electronic systems. With the proven Saber simulation technology at its core, SaberRD combines ease of use with the power to handle today’s complex electrical power problems, allowing engineers to explore design performance, optimize robustness and assure system reliability for a broad range of generation, conversion and distribution applications.

Synopsys, Inc today announced that Mazda Motor Corporation, a leading producer of automobiles, has adopted Synopsys' CoMET-METeor virtual prototyping solution to verify their Electronic Control Units (ECUs). Over the last year, Mazda has been using the METeor embedded software development environment to conduct its ECU system verification in a virtual environment. By decreasing the number of tests on real automobiles and hardware-in-the-loop si...

Synopsys, Inc. today announced that Infineon Technologies AG has used Synopsys' Virtualizer tool set to deploy virtual prototypes of their AURIX microcontroller-based systems, enabling early software development and customer engagement prior to silicon availability.

Synopsys, Inc. and Semiconductor Manufacturing International Corporation today announced availability of version 5.0 of their 40-nanometer (nm) RTL-to-GDSII reference design flow. This production-proven flow incorporates a broad range of automated low power and high-performance capabilities through Synopsys' entire tool suite, giving SMIC customers the differentiated performance and power results needed in today's chip designs.

Synopsys, Inc. today announced that it will celebrate its 25th year in business by helping transform the physical environment at Lee Mathson Middle School in the Alum Rock School District in San Jose, California.

Synopsys, Inc today announced the availability of enhancements to its LightTools illumination design and analysis software. LightTools version 7.3 delivers a variety of new illumination design features in areas such as application-specific design, color quality analysis, LED phosphor modeling, and design management and performance that can help designers work more efficiently, save product development costs and deliver high-performance lighting s...

Synopsys, Inc. today announced the availability of a complete solution to enable engineers to develop state-of-the-art System-on-Chip designs at Samsung's advanced 20-nanometer process geometry. The delivery of the solution is built on many years of close collaboration between Samsung Electronics and Synopsys R&D teams, including the tapeout of the first 20-nm chip based on Samsung's High-k metal gate process technology.

Synopsys, Inc. announce an integrated hybrid prototyping solution that combines Synopsys' Virtualizer virtual prototyping and Synopsys' HAPS FPGA-based prototyping to accelerate the development of system-on-chip hardware and software. By using Virtualizer virtual prototyping for new design functions and HAPS FPGA-based prototyping for reused logic, designers can start software development up to 12 months earlier in the design cycle.

Synopsys, Inc. today announced that TSMC has given Phase I Certification to Synopsys design implementation tools for its 20-nm process. TSMC certified the tools for its 20-nm design rule manuals and SPICE models. Certified products include Synopsys' IC Compiler for physical design; IC Validator for DRC and LVS; StarRC for extraction; and Galaxy Custom Designer for custom implementation.

Synopsys, Inc. today announced that Princess Sumaya University for Technology in Amman, Jordan is the first university in the Middle East and North Africa region to receive the Charles Babbage Grant from Synopsys. Through the grant, PSUT receives licenses for Synopsys' comprehensive, industry-leading electronic design automation software, along with curriculum support and professor training.

Synopsys, Inc. today announced that GLOBALFOUNDRIES has selected Synopsys' Yield Explorer solution as part of their next-phase Yield Management System for faster yield ramp based on volume diagnostics. Rapid identification and correction of systematic failure mechanisms is critical to bringing a new technology node to production and driving the yield ramp on new integrated circuit designs.

Synopsys, Inc. announced that Chairman of the Board and CEO Aart de Geus and President and COO Chi-Foon Chan will become co-CEOs, effective immediately. Appointing Dr. Chan as co-CEO formally recognizes the contributions he has made in co-leading Synopsys for more than 10 years. Drs. de Geus and Chan will continue to share responsibility for managing the company, and the organizational structure and responsibilities will remain the same.

Synopsys, Inc. today announced that John Chilton, senior vice president of marketing and corporate development, will speak at the 40th Annual Cowen Technology, Media & Telecom Conference in New York, on May 31, 2012.

Synopsys, Inc. announced that Accellera Systems Initiative will receive Synopsys' twelfth annual Tenzing Norgay Interoperability Achievement Award for advancing industry standards that enable interoperable system design flows. The Accellera Systems Initiative was formed in December 2011 through the merger of Open SystemC Initiative and Accellera.

Synopsys, Inc. will host several special events at the Design Automation Conference, June 3 - 7 in San Francisco, California. The events will feature speakers from leading semiconductor companies, IP providers, foundries and Synopsys.

Synopsys, Inc. today reported results for its second quarter of fiscal year 2012. For the second quarter of fiscal year 2012, Synopsys reported revenue of $432.6 million, compared to $393.7 million for the second quarter of fiscal 2011, an increase of 10 percent.