SureCore Ltd Articles
sureCore and Universal Quantum announce tape out of cryogenic IP demonstrator chip
The sureCore-led Innovate UK (IUK) - funded project "Development of CryoCMOS to Enable the Next Generation of Scalable Quantum Computers" has achieved a critical milestone with the tape out of its first cryogenic IP demonstrator chip.
CryoCMOS Consortium develops 4K & 77K transistor models
CryoCMOS Consortium, led by sureCore Ltd, reports that it has successfully created new, PDK-quality, transistor models characterised for both 4K & 77K operation. SureCore is using these to develop key foundation IP to enable the design of cryo-control ASICs for use in the quantum computing space. Key to supporting this activity were the accurate cryogenic measurements undertaken by Incize of Louvain-la-Neuve, Belgium.
4K and 77K transistor models enable CryoIP development
The Innovate UK-funded CryoCMOS Consortium, led by sureCore says it has successfully created new, PDK-quality, transistor models characterised for both 4K and 77K operation.
sureCore pushes the SRAM voltage envelope to below 0.5V
In the drive to reduce a device’s power consumption, one of the principal techniques deployed is to run it at a low voltage.
sureCore announces range of off-the-shelf memory IP
To speed up design times for customers, sureCore has launched a range of off-the-shelf, low power memory IP that is available for use at the most popular industry nodes.
sureCore’s low power memory delivers power efficiency for BLE-enabled devices
The popularity of wearable devices has seen an explosion of market entrants all vying to deliver a better user experience with a richer feature set than their competitors.
sureCore publishes In Memory Compute white paper
sureCore, the ultra-low power, embedded memory specialist, has announced the publication of a white paper outlining its innovative In Memory Compute (IMC) technology, ‘CompuRAM’.
sureCore’s low memory technologies enable designers to create reality of the metaverse
Mark Zuckerburg believes so strongly that the future is the metaverse that he changed the name of Facebook to Meta. Suddenly, an old sci-fi word has become the hottest mainstream concept with billions being invested to create its virtual worlds with hardware such as augmented reality smart glasses and full immersion artificial reality goggles.
Safer “listen through” earbuds create headaches for developers
One of the joys of earbuds is that they can isolate you into a world of beautiful music with Active Noise Cancelling (ANC) removing the sounds from the world around you.
sureCore announces technology for in-memory computing
sureCore, the low power, embedded memory specialists, has announced its new technology for in-memory computing called CompuRAM.
Multiport memory designed by sureCore
sureCore, designed a multi-port that's power and area efficient, embedded memory solution is for Semidynamics’ RISC-V-based, tensor processing chip.
Intelligent wearables enabled by sureCore's low power memory
As the market for wearable electronics and earbuds grows dramatically, architects are adding more features or ‘smarts’ to create product differentiation. The additional intelligence means that designers are required to add more embedded memory to the chip resulting in increased power demands.
Low power memory compiler programme opened for 30 days
SureCore is opening its low power memory compiler for 30 days to qualifying companies to evaluate the capabilities of its PowerMiser and EverOn standard SRAM IP products on low power metrics. The new service will prove particularly useful for constraint and compute intensive SoC designs.
Low power SRAM customises memory for artificial intelligence
sureCore's new SureFit SRAM customisation service has delivered low power high capacity SRAM subsystems implemented in advanced FinFET processes to Tier-1 players in the demanding imaging, artificial intelligence and machine learning markets.
sureCore delivers 40nmULP memory compiler
sureCore Ltd., the low power SRAM IP leader, has announced the immediate availability of its TSMC 40nmULP process technology memory compiler. The new compiler facilitates utilisation of sureCore's recently announced 40nm Ultra Low Voltage SRAM IP that effectively operates at a record-setting 0.6V across process voltage and temperature.
40nm SRAM beats low voltage operation in silicon
sureCore has revealed that its latest Ultra-Low Voltage SRAM IP effectively operates at a record-setting 0.6V across process, voltage and temperature. The results are silicon-proven on TSMC's 40nm Ultra Low Power CMOS process technology.
Achieving power savings of over 50%
The 28nm Fully-Depleted Silicon-on-Insulator (FDSOI) memory compiler has been launched by sureCore, and supports the company's low power, Single Port SRAM IP and Dual Port SRAM IP for 28nm FDSOI process technology. It also offers capacities up to 1MB with word lengths up to 288bits and supports 4, 8 and 16Mux factors.
Low-power SRAM IP targets wearable & IoT applications
An embedded SRAM IP that targets applications demanding long battery life with minimal operating and stand-by power performance has been released by sureCore. Supporting a wide operating voltage range of 0.7-1.2V, the single port SRAM boasts dynamic power savings exceeding 50% of current commercial offerings. The IP also cuts static power by up to 35% with a 10% area penalty.
SRAM designs are production-ready, low power & low voltage
sureCore has announced the opening of its latest design centre in Leuven, Belgium. The company chose the Leuven location to tap into the design ecosystem around imec and to maximise imec's recently announced investment in the company.
SRAM design offers power promise
SureCore says that early testing of its innovative low power SRAM design confirms its simulations that deliver in excess of 50% power savings over other SRAM technologies. The tests prove that the patented circuit architecture developed by SureCore delivers greater than 50% power savings versus industry standard SRAMs. SureCore’s energy-efficient memory was designed through a unique combination of detailed circuit analysis, architectural im...