To speed up design times for customers, sureCore has launched a range of off-the-shelf, low power memory IP that is available for use at the most popular industry nodes.

The popularity of wearable devices has seen an explosion of market entrants all vying to deliver a better user experience with a richer feature set than their competitors.

sureCore, the ultra-low power, embedded memory specialist, has announced the publication of a white paper outlining its innovative In Memory Compute (IMC) technology, ‘CompuRAM’.

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sureCore, the low power, embedded memory specialists, has announced its new technology for in-memory computing called CompuRAM.

sureCore, designed a multi-port that's power and area efficient, embedded memory solution is for Semidynamics’ RISC-V-based, tensor processing chip.

As the market for wearable electronics and earbuds grows dramatically, architects are adding more features or ‘smarts’ to create product differentiation. The additional intelligence means that designers are required to add more embedded memory to the chip resulting in increased power demands.

  SureCore is opening its low power memory compiler for 30 days to qualifying companies to evaluate the capabilities of its PowerMiser and EverOn standard SRAM IP products on low power metrics. The new service will prove particularly useful for constraint and compute intensive SoC designs.

  sureCore's new SureFit SRAM customisation service has delivered low power high capacity SRAM subsystems implemented in advanced FinFET processes to Tier-1 players in the demanding imaging, artificial intelligence and machine learning markets.

sureCore Ltd., the low power SRAM IP leader, has announced the immediate availability of its TSMC 40nmULP process technology memory compiler. The new compiler facilitates utilisation of sureCore's recently announced 40nm Ultra Low Voltage SRAM IP that effectively operates at a record-setting 0.6V across process voltage and temperature.

sureCore has revealed that its latest Ultra-Low Voltage SRAM IP effectively operates at a record-setting 0.6V across process, voltage and temperature. The results are silicon-proven on TSMC's 40nm Ultra Low Power CMOS process technology. 

The 28nm Fully-Depleted Silicon-on-Insulator (FDSOI) memory compiler has been launched by sureCore, and supports the company's low power, Single Port SRAM IP and Dual Port SRAM IP for 28nm FDSOI process technology. It also offers capacities up to 1MB with word lengths up to 288bits and supports 4, 8 and 16Mux factors.

An embedded SRAM IP that targets applications demanding long battery life with minimal operating and stand-by power performance has been released by sureCore. Supporting a wide operating voltage range of 0.7-1.2V, the single port SRAM boasts dynamic power savings exceeding 50% of current commercial offerings. The IP also cuts static power by up to 35% with a 10% area penalty.

sureCore has announced the opening of its latest design centre in Leuven, Belgium. The company chose the Leuven location to tap into the design ecosystem around imec and to maximise imec's recently announced investment in the company.

SureCore says that early testing of its innovative low power SRAM design confirms its simulations that deliver in excess of 50% power savings over other SRAM technologies. The tests prove that the patented circuit architecture developed by SureCore delivers greater than 50% power savings versus industry standard SRAMs. SureCore’s energy-efficient memory was designed through a unique combination of detailed circuit analysis, architectural im...