The on-chip DDS operates up to 180 MHz with a 24-bit tuning word, allowing 10.8-Hz/LSB frequency resolution and providing a single frequency output for all D/A converters and independent programmable phase-shift outputs for each D/A converter. Pattern data can include directly generated SRAM-stored waveforms, DDS outputs amplitude-modulated by SRAM, or DDS frequency tuning words from SRAM providing chirp or frequency shift keying modulation. An internal pattern-control state machine allows the user to program the pattern period for all D/A converters, the start delay within the pattern period for the signal output on each D/A converter channel, as well as the repetition rate of the pattern. A serial peripheral interface is used to configure the digital waveform generator and load patterns into the SRAM.
AD9106/AD9102 D/A Converters Waveform Generator Features:
•On-chip 4,096-word pattern memory
•On-chip DDS with 24-bit tuning word
•Sleep mode power: < 5 mW @ 3.3 V
•Supply voltage: 1.8 V to 3.3 V
•SFDR to Nyquist:
o86 dBc @ 1 MHz output
o85 dBc @ 10 MHz output
•Phase noise: −140 dBc/Hz @ 1 kHz offset, 180 MSPS, 8 mA
•Differential current outputs: 8 mA max @ 3.3 V
Pricing, Availability and Complementary Products
Complementary ADI components include the ADA4817 low noise, low distortion op amp, the AD8129 low noise differential amp and the AD9514 low jitter clock distribution IC.