Studio 7 adds significant new functionality and features, making it the most advanced and effective technology on the market for tailoring RISC-V processors to meet chip designers’ application-specific needs. Codasip engineers have used the Studio design flow to create the broadest portfolio of RISC-V processors in the industry, and they now put the power in the hands of customers to further customise and extend the RISC-V instruction set, based on the requirements of the algorithms being run.
Studio can be used for:
- Processor prototyping for a specific application domain,
- Fast design space exploration,
- Development of custom extensions using Codasip’s architecture description CodAL language.
Studio then generates hardware and corresponding SDKs that are aware of the custom extensions, including:
- Verilog or VHDL RTL and System Verilog UVM environments,
- Testbenches and synthesis scripts,
- Full compiler toolchain including advanced profiling and debugging tools,
- Both cycle-accurate and fast instruction-accurate simulation tools.
Some of the new features included with Studio 7:
- Native support for industry-standard AMBA interfaces, allowing for easy replacement of other processor cores while reusing your existing, proven peripheral IP.
- IEEE 1149-7-compatible 2-wire JTAG to minimise pin-count.
- Improvements in clock-gating for low-power requirements.
- Major updates to Codespace, the optional Eclipse-based IDE, and the underlying software tools, including support for LLVM 5.0.
“Studio 7 is a big step forward for Codasip’s advanced processor creation technology, and will take the guesswork out of implementing the ever-expanding number of ISA options in the RISC-V specification. Studio can help generate processors well-suited to the widest range of application areas, from machine learning inference engines to host processor DSP offload, networking, and storage,” stated Karel Masarik, CEO and co-founder of Codasip. “With Studio 7, there is no need to settle for a one-size-fits-all processor.”