Imec’s research program aims at exploring the full technology potential of STT-MRAM including performance beyond 1ns and scalability beyond 10 nm for embedded & stand alone applications. Research will be performed on CANON ANELVA’s deposition tool which has been installed in imec’s state-of-the-art 300-mm clean room. The tool complements imec’s advanced STT-MRAM equipment cluster. Combined with imec’s advanced litho-cluster and its material engineering capabilities, imec’s industrial partners now have access to a complete 300-mm STT-MRAM-dedicated processing capability.
The collaboration between imec and CANON ANELVA will also include the establishment of the baseline process for magnetic tunnel junctions (MTJs), joint R&D on thin film deposition and stack engineering for high-density STT-MRAM, and the development of integrated STT-MRAM devices.
“We are very pleased to co-develop with CANON ANELVA the processes for scaling STT-MRAM technology, a promising alternative high-density memory technology for the existing memory technologies such as SRAM and DRAM,” said Luc Van den hove, CEO at imec. “The first excellent lab tests on CANON ANELVA’s MTJs confirm the joint ambition of imec and CANON ANELVA to significantly move forward with scaling STT-MRAM devices, bringing this technology closer to industrial viability.”
“Working with imec, a premier R&D facility on advanced memory scaling, is an exciting opportunity for CANON ANELVA,” said Junro Sakai, President and Representative Director at CANON ANELVA.