Test & Measurement

Bit error ratio tester wins PCI-SIG approval

Keysight Technologies’ M8040A 64 Gbaud High-performance bit error ratio tester (BERT) was approved by the PCI-SIG as a compliance test measuring instrument for PCI Express 4.0 (PCIe Gen4) testing at 16 gigatransfers per second (GT/s) and 8GT/s.

Keysight says it is the only test vendor with two BERT systems approved by the PCI-SIG for testing PCIe 4.0 and PCIe 3.0 technologies.

As serial bus technologies increase in speed and bandwidth, test equipment vendors are tasked with delivering tools capable of testing beyond the state of the art.

Keysight's BERT system enables accurate physical-layer design verification of high-speed communication and multigigabit digital interfaces.

The M8040A 64 Gbaud High-performance BERT is the only PCI-SIG approved receiver test BERT for PCIe 4.0 capable of testing PCIe 5.0 (32GT/s) and enables pathfinding (the process of selecting a design choice by evaluating different technical approaches against a set of defined system parameters and goals) for the emerging PCIe 6.0 (64GT/s) speeds.

"The PCI-SIG is very pleased to have Keysight participate as one of the key test vendors it relies on to provide effective compliance testing to our members at its official workshops," said Al Yanes, chairman of the PCI-SIG. "We appreciate the time, effort and expense associated with our test events and recognise Keysight's continued support of SIG activities, especially obtaining approval for the equipment that is used for official compliance testing."

"Keysight is pleased to receive PCI-SIG's approval of the M8040A high performance BERT for PCIe 4.0 receiver testing," said Kailash Narayanan, vice president for Keysight's commercial communications group. "The PCI Express standard is important to Keysight and our customers. As the industry looks ahead to PCIe 6.0, we believe that approval of our M8040A for PCIe 4.0 receiver testing will enhance our customer’s confidence in test tools that can be used today while offering a clear runway to next generation technologies at speeds up to 32Gbaud PAM4."

"PCI Express based I/O technology is expected to set the lead for high-performance I/O interfaces including accelerator interconnects like Compute Express Link," said Jim Pappas, Director of Technology Initiatives, Intel. "Receiver and transmitter test solutions from companies including Keysight Technologies are critical to enabling the development, deployment and adoption of high performance I/O technologies on future Intel platforms and throughout the industry."

The PCI-SIG (originally formed as the Peripheral Component Interconnect Special Interest Group) develops and manages the PCI bus specification, the industry standard for a high-performance I/O interconnect for transferring data between central processing units and peripherals.

Currently, the PCI-SIG manages the PCI, PCI-X® and PCI Express standards. 

The PCI-SIG continues to evolve the PCI standard to meet the industry's needs.

Through interoperability testing, technical support, seminars and industry events, the PCI-SIG enables its members to generate competitive and quality products.

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