In order to select the optimum set of characteristics for a transmitter, channel and receiver, today’s signal integrity engineers need to determine ultralow bit-error-rate (BER) contours for thousands of points in the design space. Traditional techniques used to accomplish this task consume a prohibitively long simulation time.
The new statistical mode in our Channel Simulator eliminates the need for long, multimillion-bit simulations, said Colin Warwick, signal integrity product manager in Agilent’s EEsof EDA organization. Now engineers can generate eye diagrams with ultralow BER contours in just a few seconds, enabling very rapid and complete ‘what if’ design space exploration.
At today’s multigigabit-per-second rates, high-frequency phenomena like impedance mismatch, reflections, crosstalk, skin effect and dielectric loss come into play. Agilent’s Channel Simulator allows designers to perform simulations using circuit-level models that can be verified against measured data and EM simulation of the layout artwork.
While we’ve used the sophisticated Transient Simulator for some time to calculate an accurate step response from distributed elements, combining it with the Channel Simulator’s new statistical mode provides us with an even more powerful solution, said Chad Morgan, principal engineer at Tyco Electronics. We use it for noise calculations, jitter injection and equalization optimization. Having all of these capabilities in one easy-to-use environment is exciting and allows us to quickly and easily analyze channels and push them to new speeds.