This article originally appeared in the May’25 magazine issue of Electronic Specifier Design – see ES’s Magazine Archives for more featured publications.
By Paul Wells, CEO, sureCore
Qubits are the fundamental units of quantum information. Unlike classical bits, which can only exist in a binary state of 0 or 1 at any moment, qubits can effectively take on three states: 0, 1, or simultaneously both. This is due to a quantum occurrence known as superposition. Superposition allows developers to implement novel, massively parallel algorithms, offering opportunities for acceleration of certain computational tasks. However, for quantum computing to reach its potential, the number of qubits must increase significantly – from the several hundred possible today to millions.
Whilst there are several competing qubit technologies, the most mature are superconducting and trapped ion. To exhibit quantum behaviour, both approaches demand qubits be cooled to just a few degrees above absolute zero within a cryostat. At these temperatures, controlling and observing qubit states is a substantial challenge. Currently, much of the control electronics is located outside the cryostat at room temperature. While suitable for small-scale systems, this is now a bottleneck in delivering next-generation systems. Experts believe co-locating control electronics within the cryostat is crucial for scaling. Yet, this integration presents difficulties.
Challenges
Current designs place control electronics outside the cryostat, as semiconductor technology is typically only qualified to work down to -40°C. Operational qubits demand temperatures lower than 4K. This requires specialised circuit design techniques and IP suited for such frigid environments. Power and thermal management are key concerns. Power consumption must be kept low to minimise heat, avoiding additional thermal load on the cryostat. Heat from electronics could exceed the cooling capability, raising the temperature and disturbing the qubits’ sensitive quantum state.
Benefits
Reducing power consumption: conventional control systems built from off-the-shelf components operating at room temperature are not currently thermally efficient. Even if there was the space within the cryostat the power consumed would place a considerable burden on the cooling capability of the cryostat. To address this, specially designed control ASICs optimised for low temperature operation are being co-located within the cryogenic environment. This dramatically helps to reduce power consumption leading to a more efficient system overall.
Reducing cable complexity: traditionally, control electronics communicate with the qubits via a mass of long cables that must be fed into the cryostat. This results in a bulky and complex setup. Integrating the electronics inside the cryostat reduces the cable requirements, simplifying the layout and shrinking the overall system size.
Shortening signal paths: with dedicated cryogenic control ASICs, the monitoring and control signals need to travel a much shorter distance, which dramatically improves signal integrity and ensures the accurate communication with the qubits. Less cabling also reduces system noise. This is particularly important for large quantum computers where even small amounts of noise can disturb the sensitive qubits and cause errors.
Speeding up communication: if the control electronics are collocated with the qubits this means that communication will be faster. This leads to faster manipulation and reading of the qubit state. Again, overall system efficiency and speed are optimised.
Improving scalability: integrating control electronics enables the system to scale more easily to a larger number of qubits, allowing processing units alongside the qubits within the cryostat instead of packing in extra cables from the outside. This offers an effective approach to building larger quantum computers.
Recent advances
In recent years there has been a surge in the number of projects focused on scaling quantum computing. One Innovate UK funded project has specifically targeted the issue. Entitled ‘Development of cryogenic CMOS to enable the next generation of scalable quantum computers’ it was undertaken by a consortium of seven industrial and academic partners with the expertise needed to create cryo-tolerant semiconductor IP. Led by sureCore, the aim was to develop a range of foundation IP that could operate in such a harsh environment. This would help to accelerate quantum computing scaling by providing the IP that would allow cryogenic control ASICs to be developed. As highlighted, this will facilitate the migration of the control electronics into the cryostat.
sureCore employed its ultra-low power memory design skills to create embedded Static Random Access Memory (SRAM), register files, and contact programmable ROM. These are all key building blocks for any digital subsystem that is capable of operating at 77 Kelvin down to the absolute zero temperatures needed for quantum computing.
sureCore is now licensing its CryoMem range of memory IP that is designed for use at the extremely low temperatures required for quantum computing applications. Enabling quantum computing developers to create their own custom control SoCs, which can be housed with qubits inside the cryostat will play a pivotal role in accelerating the scaling of quantum computers.
