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Microsemi Expands DDR3 SDRAM Family with 4GByte Solution for High-reliability Applications

2nd November 2011

ES Admin

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Microsemi Corporation has announced a DDR3 SDRAM memory device that is the first of its kind to be packaged in a single plastic ball grid array (PBGA) and offered as a compact x64/x72 unregistered dual in-line memory module (UDIMM )/small outline dual in-line memory module (SODIMM). The solution provides up to 4GByte compact memory densities that support high-performance processors and chipsets in mission-critical applications such as avionics, UAVs, missile systems and other defense applications that require high reliability in harsh environments.

“With this expansion of Microsemi’s DDR3 SDRAM family, we are able to provide a full range of high-performance memory products for today’s demanding military applications,” said Jack Bogdanski, director of marketing for Microsemi. “Product designers also benefit from the high-density packaging as it saves board space. This enables designers to include additional features and functionality into existing designs.”

Microsemi’s commercial off-the-shelf (COTS) DDR3 SDRAM devices give customers a standalone, high-density memory solution that also meets the data widths necessary for many applications. The DDR3 devices significantly reduce space requirements as compared to systems built from discrete memory components, and also use less board space than memory solutions using chip scale packages (CSPs) and other single-die solutions. Microsemi’s memory devices also streamline I/O routing and reduce component count and placements while delivering superior signal integrity.

Key features include:
Measures only 23 mm x 32 mm, on 1mm pitch
Available in a 543 PBGA package, with SnPb balls
Offers 44 percent space savings and 23 percent reduced I/O routing as compared to solutions with similar capabilities built from discrete components
Supports data rates of 800, 1,066 and 1,333 megabits per second (Mb/s)
Operates on a 1.5 volt power supply
Typically uses less power at the same data rate when compared to a DDR2 device
Available in commercial and industrial temperature ranges
Footprint compatible with Microsemi 1GByte and 2GByte devices
Designed for DDR3 fly–by routing
Address, command and clock terminations included
RZQ calibration resistors included
Built in decoupling

Microsemi’s high-speed memories optimize performance by using a four ns-prefetch architecture with an interface that allows two data words to be transmitted per clock cycle. The devices can be ruggedized and processed for tamper resistance, and are offered in densities up to 4GByte in both 512Mx72 and 512Mx64 configurations. The company plans to offer a low-profile option that will be footprint-compatible with the current 375 PBGA package. All devices are subjected to extensive environmental and temperature testing.