Design teams need to complete as much of the software development process as possible in parallel with the hardware development for complex System on Chip designs, stated Steve Roddy, Tensilica’s vice president of marketing. By emulating our processors in an Avnet FPGA board, software developers can significantly speed up their development cycles when compared to using only software simulation methods.
Tensilica’s software developers’ toolkits (SDKs) — consisting of an IDE, code development toolchain and Tensilica’s instruction set simulator (ISS) — work seamlessly with either Avnet FPGA board. The software tools include libraries that enable software developers to use standard C library functions such as print to print out to the host PC and read/write from the hard disk of the host PC.
Designers using Tensilica’s processors can take maximum advantage of an Avnet Virtex-4 Development Kit to gather extensive hardware-based profiling information. With hardware-based profiling, developers can get an execution profile of the program, which allows the developer to quickly pinpoint execution hotspots. This profile can be viewed graphically within Tensilica’s Xtensa Xplorer IDE.
Using feedback compilation, a developer can set a flag so statistics can be collected on the number of times branches (loops, jumps, etc.) are taken or not taken during execution on the Avnet Xilinx Development Kit board. The Xtensa C/C++ compiler then uses these run-time generated statistics and recompiles the program to optimize (a) for speed by placing most frequently taken branches in straight-line code, and (b) for code size by compiling less frequently executed routines for code size rather than speed. The feedback-based compilation method speeds up applications between 5 to 15 percent and reduces code size by up to 15 percent.
Additionally, the Ethernet interface on the boards make them ideal for running an operating system such as Linux and the associated TCP/IP stack and network file systems.
