The Virtex-5 LXT FPGAs are the first to deliver built-in PCI Express Endpoint and Tri-mode Ethernet Media Access Controller (MAC) blocks. The Virtex-5 LXT platform also features the industry’s lowest power 65-nanometer (nm) transceiver, typically consuming less than 100mW per
channel at 3.2 Gbps.
Synplicity and Xilinx continue to work closely through the Ultra-high Capacity Timing Closure Task Force announced by the two companies in May 2006. The mission of this Joint Task Force is to allow engineering teams from both companies to collaborate, define and implement new design flows that maximize the quality of results and design productivity of ultra high-density designs with next-generation 65-nanometer (nm) FPGAs. There is a wide variety of applications enabled by these ultra high-capacity devices and Synplicity has created technology that will be used in the future to
support better Incremental Design Flows optimized to meet these unique design goals.