Design

Processor emulation tools extended to allow dynamic tests

13th June 2016
Mick Elliott
0

The range of processor emulation tools from Goepel for the “Jacinto” DRA74x series of Texas Instruments has been extended. These libraries, known as VarioTAP models, are structured modularly as intelligent IP and allow a complete fusion of boundary scan test and JTAG based emulation.

The processor is thereby controlled through the native debug port. Based on this, users are able to execute hardware design validation and prototype tests without firmware. Moreover, the method provides the use of dynamic tests as well as faster in-system flash programming.

Processors of the DRA74x family come from the OMAP series of Texas Instruments, which have been developed for best performance in video and image processing as well as graphics computation.

These processors address the automotive infotainment market and are thus to be found among others in graphical HMI and Navigation, Digital and Analog Radio and Multimedia-entertainment. The derivatives are equipped with two Cortex A15 and two Dual Cortex M4 cores.

The internal peripheries can be addressed via the JTAG interface, GPIOs can be controlled and external flashes can be programmed and verified.

The DRA74x device is offered in a FCBGA package with 760 balls, 0.8-mm pitch and is adapted via JTAG interface, which also enables the use of Boundary Scan and VarioTAP.

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