Mr. Vadalia further added, “Multiple cards are possible in a rack PC for analysis of 4 or more signals simultaneously. When LightSpeed 1000 is enclosed, the USB 2.0 interface is used to connect with a Notebook PC. The GigE port provides independent Ethernet testing at wirespeed for applications such as BERT and RFC 2544“. He added, “A unique feature of the card is the capability to capture and transmit at wirespeed to/from hard disk on all interfaces”.
Important features:
* Ability to capture to disk at full rate in both directions without error. This permits detailed offline analysis that is not possible with other test instruments. Capture is possible on both optical ports and the single Ethernet port. Triggered and filtered capture is also possible.
* Wirespeed BERT over ATM, POS, and RAW formats on both ports simultaneously
* Complex and flexible filtering options: Sixteen 128 bit independently applied filters, both ports, 128 bit user defined mask per filter, AND/OR Boolean expressions, include and exclude conditions
* Hardware based precise time stamping of cells / packets with 10 nsec resolution, 1 ppm accuracy
* Portability thru a USB 2.0 Interface
* Single Mode or Multi Mode Fiber SFP support
* High performance x4 PCIe compliant interface
* Onboard SODIMM memory (DDR2) – up to 2 Giga bytes
Modes of Operation:
POS Mode – Packet over SONET / SDH
POS, or Packet over SONET/SDH at OC3/12 and STM1/4 is supported at full rates over dual interfaces. Access, capture, analysis, and emulation of PPP and HDLC, all carrying IP traffic in real-time makes this card useful to many applications including Routing, Deep Packet Inspection, and other Internet traffic applications.
Current POS applications include:
* POS Protocol Analysis with PPP / HDLC at wirespeed
* POS Tx / Rx Test – an emulation and test capability that transmits test packets and checks same on receive
* POS BERT – support for the following PRBS Patterns: 2ˆ9 – 1, 2ˆ11 – 1, 2ˆ15 – 1, 2ˆ20 – 1, 2ˆ23 – 1, 2ˆ29 – 1, 2ˆ31 – 1, All one’s, All Zero’s, Alternate ones and zeros, user defined pattern of lengths from 2 to 32 bits, invert and non-invert selections, single bit error insertion, error insert rate from 10ˆ-1 to 10ˆ-9, status for pattern sync, bit errors counters, and packet rate and packet gap configuration options, configurable header lengths and header information
* Wirespeed capture of POS packets to hard disk on both ports simultaneously; Filtering and time stamping of packets
* Alarms and Error Logging
ATM – Asynchronous Transfer Mode
ATM at OC3/12 STM1/4 is supported at full rates over dual interfaces. Access, capture, analysis, and emulation of ATM cells at wire-speed make this interface capability applicable for wide ranging next generation networks.
Current ATM applications include:
* ATM Protocol Analysis for AAL2 and AAL5
* ATM Tx/Rx Test – an emulation and test capability that transmits test cells and checks same on receive
* ATM BERT – support for the following PRBS Patterns: 2ˆ9 – 1, 2ˆ11 – 1, 2ˆ15 – 1, 2ˆ20 – 1, 2ˆ23 – 1, 2ˆ29 – 1, 2ˆ31 – 1, All one’s, All Zero’s, Alternate ones and zeros, user defined pattern of lengths from 2 to 32 bits, invert and non-invert selections, single bit error insertion, error insert rate from 10ˆ-1 to 10ˆ-9, status for pattern sync, bit errors counters, and cell rate and cell gap configuration options
* Other ATM BERT options – 52 byte ATM cell (without HEC) and 53 byte ATM cell (with HEC), HEC error insertion, on receive filtering is provided for idle cells, GFC, VPI, VCI, CL, and PT cells, cell counters for total cells, valid cells, idle cells, filtered cells, and filtered out cells
* Wirespeed capture of ATM cells to hard disk on both ports simultaneously, filtering and time stamping of cells
* Alarms and Error Logging
RAW or Transparent Mode
Raw or transparent mode allows direct access to the SONET / SDH payload for BERT, data transmit and receive applications.
Current applications include:
* RAW BERT – support for the following PRBS Patterns: 2ˆ9 – 1, 2ˆ11 – 1, 2ˆ15 – 1, 2ˆ20 – 1, 2ˆ23 – 1, 2ˆ29 – 1, 2ˆ31 – 1, All one’s, All Zero’s, Alternate ones and zeros, user defined pattern of lengths from 2 to 32 bits, invert and non-invert selections, single bit error insertion, error insert rate from 10ˆ-1 to 10ˆ-9, status for pattern sync, and bit errors counters
* Wirespeed capture of raw data to hard disk on both ports simultaneously
* Alarms and Error Logging