Design
Juniper Networks Selects RealTime Designer from Oasys for Next-Generation Networking Chip Designs
Oasys Design Systems today announced that Juniper Networks® has selected RealTime Designer™, a revolutionary new Chip Synthesis™ platform, for the design of its next-generation networking chips. “After a thorough evaluation, we determined that RealTime Designer offers high-quality results and performs very well in our environment,” said Debashis Basu, vice president for Silicon Development at Juniper Networks. “It is a great tool tha...
VSIDE - VSDSP Integrated Development Environment
VLSI Solution has today announced VSIDE - the Integrated Development Environment for VSDSP Processor Family. VSIDE is an integrated development environment for VLSI Solution's 16/40-bit VSDSP digital signal processor family. It contains a complete set of development utilities, including an optimizing ANSI-C compiler, assembler, linker, profiler, etc. All programs are integrated into a simple-to-use, easy-to-learn package running on a PC / Windows...
Freescale’s CodeWarrior 10 tool suite, based on the Eclipse platform, eases embedded software development
Freescale Semiconductor is helping streamline embedded software development with the launch of its new CodeWarrior 10 development suites, based on open-source Eclipse technology.
IAR Systems collaborates with Freescale to develop i.MX25 starter kit
IAR Systems today announced the availability of an integrated development kit for the Freescale i.MX25 family of low power ARM®9-based microprocessors. The IAR KickStart Kit for Freescale Semiconductor i.MX25 contains an i.MX25-SK evaluation board, software development tools together with a hardware debug probe. The evaluation board, using a i.MX257 device, features 32 Mbyte of SDRAM, 1 Gbyte of Flash memory and a 320 x 240 colour TFT LCD displa...
ARM, IBM, Samsung, GLOBALFOUNDRIES and Synopsys Announce Delivery of 32/28nm HKMG Vertically Optimized Design Platform
ARM, Samsung Electronics, Co., Ltd., GLOBALFOUNDRIES and Synopsys today announced the delivery of the industry’s first complete vertically optimized 32/28 nanometer (nm) design platform. Demonstrating the strength of the collaboration established and announced at DAC a year ago, the companies are collectively providing a technology enablement solution for the design and manufacturing of advanced mobile and embedded devices.
Magma, GLOBALFOUNDRIES and Virage Logic Deliver Reference Flow for GLOBALFOUNDRIES 65-Nanometer Low-Power Process
Magma Design Automation, GLOBALFOUNDRIES and Virage Logic (Nasdaq:VIRL), today announced the availability of a proven, Unified Power Format (UPF)-compliant RTL-to-GDSII reference flow. This automated, comprehensive solution streamlines the design and manufacture of ICs that incorporate Virage Logic’s intellectual property (IP) and are manufactured in GLOBALFOUNDRIES’ 65LPe 65-nanometer (nm) low-power process technology.
Agilent Technologies Offers Industry's First Automatic IBIS-AMI Model Generation Capability in an ESL Design Flow
Agilent announced that its SystemVue Electronic System-Level (ESL) design software, version 2010.07, will automatically generate IBIS Algorithmic Modeling Interface (IBIS-AMI) models. IBIS-AMI, a modeling standard for serializer-deserializer (SerDes) transceivers, was created to enable fast, statistically significant analysis of high-speed digital chip-to-chip links. For the first time, IC manufacturers will be able to automatically generate IBIS...
Agilent Technologies' Device Modeling Software Enables Successful Development of Hua Hong NEC's RF Device Modeling Platform
Agilent announced that China-based Shanghai Hua Hong NEC Electronics Company, Ltd. has successfully used Agilent's Integrated Circuit Characterization and Analysis Program (IC-CAP) software to develop an RF device modeling platform for 0.35µm and 0.18µm RF semiconductor devices.
UMC Qualifies Magma's 3D Field Solver QuickCap NX as Reference Parasitic Extraction Tool
Magma Design Automation announced that United Microelectronics Corporation (NYSE: UMC; TSE: 2303) (UMC) has qualified QuickCap NX as a reference parasitic extraction tool for 40- and 65-nanometer (nm) process technology.
Wintegra Selects Magma’s Quartz DRC and Quartz LVS to Accelerate Physical Verification of Low-Power, High-Performance 65-nm Chip
Magma Design Automation announced that Wintegra, a leading provider of access processing semiconductors and software for next-generation telecommunication infrastructure solutions, has successfully taped out its latest low-power, high-performance 65-nanometer (nm) chip using Magma’s Quartz™ physical verification products. With Quartz DRC’s and Quartz LVS’s advanced capabilities, Wintegra was able to quickly sign off on the design using T...