Brook Sandy-Smith, Technical Support Engineer for PCB Assembly Materials, will moderate BTC Void Reduction For Yield and Performance Enhancement, which will focus on reliability, materials, reflow, and inspection. Raiyo Aspandiar of Intel Corporation will co-chair the session.
The following presentations will also offer participants information and best practices to Avoid the Void:
- Component and Solder Joint Reliability With Voiding by Dave Hillman, Rockwell Collins;
- Materials to Mitigate Voiding in Electronics Assembly by Dr. Ron Lasky, Indium Corporation Senior Technologist;
- Reflow Strategies to Minimize Voiding by Dave Heller, Heller Industries;
- Accurate Reflow Profiling to Minimize Voiding by Marybeth Allen, KIC
- X-Ray Inspection Strategies to Accurately Characterize Voiding by Keith Bryant, YXLON International