Xilinx has validated Virtex-6 HXT FPGAs interoperability with industry leading optical transceiver suppliers including Avago Technologies. Avago Technologies is pleased to offer optical transceivers compatible with Virtex-6 FPGAs for standards including 10Gbps and 40Gbps Ethernet, said Victor Krutul, Director of Marketing, Fiber Optics Product Division at Avago. With over 30 years of experience in optical interconnects as part of HP and Agilent, Avago is uniquely able to help FPGA designers make the move from copper to fiber optic interconnects as connection speeds move to 10 Gbps and beyond.
Xilinx Virtex-6 HXT devices seamlessly interface to industry standard SFP+, XFP, and CFP optical modules at line rates up to 11.18Gbps addressing next generation optical transport application needs. Furthermore, through superior jitter performance – sub 500 fs rms random jitter at 11.18Gbps – and signal integrity, the need for external conditioning circuitry is eliminated. The superior jitter performance provides the system designer the margin required to build robust high speed interfaces.
As the communications network infrastructure moves towards 40Gbps and 100Gbps port rates, the need for high performance optical jitter compliant transceivers is a critical component for success, said Krishna Rangasayee, Corporate Vice President and General Manager of Xilinx’s Communications Business Unit. Xilinx’s Virtex-6 HXT device meets those optical standards and requirements while offering the flexibility and customization only available in a programmable logic device.
Virtex-6 HXT Devices Features
Optimized for applications that require ultra high-speed serial connectivity, Virtex-6 HXT FPGAs offer the industry’s highest serial bandwidth through a combination of 6.6Gbps GTX transceivers and 11.18Gbps GTH transceivers to enable next-generation packet and transport, switch fabric, video switching, and imaging equipment. To enable these applications, Virtex-6 HXT devices also feature:
* A ground up design that is optimized for 10G signaling – including Transmit (Tx) pre-emphasis, Receive (Rx) linear equalization and Decision Feedback Equalizer (DFE) to meet the tough jitter requirements.
* Lower jitter with superior DFE and EQ circuits, higher total transceiver count, more BRAM and highest number of SERDES capabilities.
* Design topology that isolates the high performance analog circuits from the noisy digital logic and IO providing superior noise performance.
* A ground up package design with all serial pins isolated from parallel IO, in-package power planes and capacitors, and a sparse-chevron pinout resulting in 40 dB of isolation between Tx and Rx and 30dB of isolation between channels.
* Overall Virtex-6 HXT device performance enables the designer to interface to optical modules directly without the need for external re-timers, thereby saving on bill-of-materials cost, power dissipation and board real estate.