Evatronix USB-IF Verified USB 3.0 Device Controller Achieves Over 430 MB/s

The Evatronix SuperSpeed USB 3.0 Device controller (USBSS-DEV) has been designed to meet the requirements of the USB specification for SuperSpeed peripheral controllers in its most current version - 1.0. The controller implements the OCP socket as the primary interface for both microprocessor and memory. Wrappers for popular system bus interfaces are available as a part of the delivery.

The USBSS-DEV reaches over 430 MB/s of throughput when implemented in a Xilinx Virtex5 FPGA with CPU and Ellisys USB protocol analyzers running, which is 94% of the maximum value you can achieve in pure hardware bursts with no CPU or software overhead.

The Evatronix controller has also been verified with both USB-certified xHCI hosts from NEC and Fresco Logic, as well as has passed all SuperSpeed USB 3.0 compliance tests included in chapter 9 of the USB specification. The USB controller is targeted for USB Peripheral Device compliance tests, which should be launched by the USB-IF in Q1 2010.

The Evatronix SuperSpeed USB 3.0 Device controller is available for straightforward implementation into FPGA devices, which allows early adopters to have programmable prototypes of the USB 3.0 device available prior to going to costly ASIC technologies.

„Our latest release of the SuperSpeed USB 3.0 Peripheral Device controller shows our constant drive to offer the latest improvements in this highly popular technology to early adopters”, said Dariusz Kaczmarczyk, USB Product Line Manager at Evatronix. „We are currently offering a working single chip FPGA solution that implements the SuperSpeed USB 3.0 Controller with least CPU overhead. This is a great opportunity for our customers to develop applications that will utilize the high speed edge of USB 3.0 to the highest possible extent”.