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Measurement/simulation correlation for high-speed digital design

22nd January 2016
Nat Bowers
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From booth 627 at DesignCon 2016, Computer Simulation Technology and Wild River Technology have presented the first results of their cooperation, aimed to demonstrate the correlation of simulation and measurement for high speed digital design.

New technologies such as DDR 4 and in particular SerDes are pushing electronics to higher speeds. This has increased the need for 3D electromagnetic field simulation in the design process to identify and help avoid signal integrity and power integrity issues. To simulate devices accurately, design engineers working in this field require accurate broadband models for interconnects and transmission lines, which need to include effects such as conductor surface roughness and dispersion in dielectric materials. Being able to validate the results against benchmarks increases the engineer’s confidence in the simulation.

Engineers in leading companies in the electronics industry use the CST STUDIO SUITE software package to analyse signal and power integrity. With mature time-domain and frequency-domain solvers, CST simulation tools have a strong background in applications from classical microwave into the terahertz regime and are well suited to the challenges of high-speed digital design. WRT meanwhile markets products for high-speed signal integrity engineers who need to characterise high-speed digital systems very accurately. Through the cooperation of CST and WRT, simulations can now be verified against measurements using the CMP-28 Channel Modeling Platform. This is powerful tool for the development of high-speed systems and includes a range of structures for benchmarking 3D EM simulations and verifying simulation and measurement methods.

Dr. Klaus Krohne, Market Development Manager, EDA, CST, commented: “A strong correlation between measurement and simulation is absolutely critical to the successful use of the simulation tools. This cooperation with Wild River Technology means that users can now simulate the behaviour of a high-speed channel and then easily check the simulated results against real measured data. This will not only give users more confidence in their results but also help them to avoid some of the common measurement or simulation mistakes that can slow down the development process.”

CST will be presenting at DesignCon at booth 627 and WRT at booth 752.

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