Ubidyne chooses Toshiba for wireless infrastructure SoC development

Ubidyne’s solution dramatically lowers the cost of wireless infrastructure for network operators. The company’s Antenna Embedded Radio system offers the highest level of integration and radio performance by embedding directly into the antenna housing, eliminating the need for remote electrical tilt motors, large power amplifiers and bulky coaxial feeders. Patent pending technology enables an all-digital distributed architecture comprising unique algorithms and proprietary ASICs allowing for efficient, standards-agnostic, wideband transmission and reception. Ubidyne’s micro-radio is the world’s first pure digital radio system, enabling mobile infrastructure equipment vendors worldwide to significantly improve performance, flexibility and coverage.

Ubidyne and Toshiba selected a hybrid ASIC/COT model to develop Ubidyne’s complex SoC. This model allowed Ubidyne to concentrate fully on the system design and on the development of their custom-designed, high-speed, digital IP blocks, which are critical key components of the overall system. Here, Ubidyne used Toshiba’s 90nm PDK and libraries. Toshiba’s European LSI Design and Engineering Centre (ELDEC) took over classical ASIC tasks for chip level implementation including complex logic and memory integration. Design review with ELDEC’s mixed signal team, chip verification, timing closure and design for test were done jointly in close collaboration.

“Using a hybrid ASIC/COT flow enabled us to combine the best of both worlds – Ubidyne’s system and custom design know how and Toshiba’s professional ASIC flow – to achieve the fastest overall development time and cost efficiency,” commented Mike Levis, COO of Ubidyne.

“We see this model becoming more and more attractive, especially for 65nm and 40nm, as it gives customers the option to focus on their key differentiators - such as RF, mixed signal or high-speed IP - and takes away the burden of investing significant money and resources to establish a complete COT flow,“ said Dr. Ulrich Roettcher, senior manager technology at Toshiba Electronics Europe.

The Ubidyne D2.0 device includes two high speed interfaces. A PCI express hardmacro provided by Toshiba is used as the interface with the baseband portion; two proprietary RX and TX hardmacros operate as interfaces with the RF amplifier and receiver. Toshiba's Very High Speed CMOS option (VS) enables the PHY and logic of both proprietary hardmacros to run at up to 4GHz. For individual programming a PCOP cell (Pure CMOS One-time PROM / One-time programmable electrical fuse) is used. The IC is supplied in a QFN88-1010 package.

The TEE ASIC & Foundry Business Unit’s open and advanced Integrated Device Manufacturer (IDM) model allows customers to speed development and reduce risk by choosing a single partner for design, implementation, production and full-service supply chain management. The company offers a wide range of leading edge CMOS solutions based on Toshiba’s own process developments. Customised SoC development is supported through a broad lineup of Intellectual Property (IP), including in-house and third party analogue and digital IP, ARM and MIPS processors, and embedded memory options.

To speed application development Toshiba offers local competence and support through its European LSI Design and Engineering Centre. ELDEC’s highly skilled engineers have many years of experience in EDA, analogue development and design, implementation and layout. In addition, short development Turn-Around-Time (TAT) and low risk is assured thanks to flexible SoC design methodologies, optimised factory processes and professional project management.