Tensilica - High-Performance ConnX Baseband Engine for LTE and 4G Wireless DSP Handsets and Base Stations
Tensilica has announced the first member of its new ConnX family of DSP cores for system-on-chip design. The ConnX Baseband Engine enables efficient baseband processing for 3G, LTE (Long-Term Evolution) and 4G wireless equipment with its scalable, high-performance DSP architecture that provides industry leading computational throughput of 16 18-bit MACs per cycle. The ConnX Baseband Engine features an optimized instruction set, high memory bandwidth, scalable clustering, and efficient compiler support with an easy programming model for SIMD (Single Instruction, Multiple Data) vectorization and other DSP functions. This high performance core is also an effective solution for multi-standard fixed and mobile DTV broadcast demodulators.The new ConnX Baseband Engine builds on Tensilica’s customizable Xtensa LX dataplane processor (DPU) technology and leverages the proven Vectra LX DSP engine option to become one of the fastest DSP cores on the market. The ConnX Baseband Engine is ideal for emerging baseband PHY standards, especially those using Orthogonal Frequency Division Multiplexing (OFDM) modulation and Multiple Input Multiple Output (MIMO) transmission.
Easy programmability, including automatic vectorization for ANSI C programs, and optimized instructions for fast complex FFT (Fast Fourier Transform), FIR (Finite Impulse Response) filters, and complex matrix operations make the new architecture particularly suitable for low-cost base station designs, femto-cell projects, digital media broadcast receivers and software-defined radio handsets.
“Our engineers have utilized the full extent of our customizable DPU technology to make the ConnX Baseband Engine,” stated Chris Rowen, Tensilica’s chief technology officer. “We’ve added over 200 baseband-specific instructions for compute-intensive functions that slow down other DSP cores. By making this into a 3-slot VLIW (Very Long Instruction Word) machine with up to two load/stores plus one MAC (Multiply Accumulate) and one ALU (Arithmetic Logic Unit) operation per cycle, we get outstanding performance for challenging 4G data throughput requirements.”
29th March 2011
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