Video-over IP reference design enables JPEG 2000 networks

The reference design is a four-channel transmitter-and-receiver platform. The transmitter is able to take up to four SDI HD streams (1080p30), optionally compress them with JPEG 2000 and send them over 1Gb/s (with compression) or 10Gb/s (without compression) Ethernet according to the VSF TR-01 standard. The receiver platform, conversely, can receive the IP stream, de-encapsulate and decompress it, and put it on up to four SDI HD links. By using the four input channels of the reference design in quad-SDI mode, products can send 4K signals over the network.

The design has been implemented on two platforms, one using Xilinx’s Zynq-7000 All Programmable SoC and the other using the Kintex-7 FPGA. The IP cores that are used are available for the full range of Xilinx FPGA systems, up to the UltraScale level. The cores can therefore be integrated in solutions that address the complete range of OEM system requirements, from low-cost, high-volume applications to demanding high-performance applications. For encoding and decoding, the design includes the Barco Silex JPEG 2000 encoder and decoder IP cores. These are single-FPGA solutions for high-performance, simultaneous multichannel 720p30/60, 1080i, 1080p30/60 and 2K/4K/8K JPEG 2000 encoding and decoding.

This reference design arrives at a time when the use of IP networks in the video industry is beginning to take off. The ability of OEMs to capture a share of that new market will depend on how fast they can get products out. By combining the JPEG 2000 cores of Barco and the transport cores of Xilinx, OEMs may produce and update standardised broadcast equipment much faster, making their products future proof in the process.

Barco Silex will showcase its JPEG 2000 Video-over-IP design at the NAB 2015 tradeshow, which takes place from 11^th to 16^th April in Las Vegas. The company will be located at booth C8427b.