Design software enhances next-gen programmable logic device productivity

6th November 2015
Posted By : Barney Scott
Design software enhances next-gen programmable logic device productivity

Signaling a new era in design productivity for next-gen programmable logic devices, Altera has released Quartus Prime. The software environment builds upon the company’s Quartus II software, incorporating the productivity-centric Spectra-Q engine. The Quartus Prime design software is optimised to enhance the FPGA/SoC FPGA design process by reducing design iterations, delivering the industry’s fastest compile times, and accelerating silicon performance.

“Our software tools are known throughout the industry for providing the highest levels of performance and productivity,” said Alex Grbic, senior director of software and IP marketing at Altera. “The Quartus Prime design software extends Altera's leadership by building upon decades of software innovations to provide our customers with new levels of performance and productivity for programmable logic devices.”

Quartus Prime design software users will experience the same easy-to-use front-end user interface as the previous software version; while the addition of the Spectra-Q engine on the back-end enables unprecedented compile time improvements and increased design performance with a new set of faster and more scalable algorithms. The engine also features a hierarchical database that preserves placement and routing of IP blocks to ensure stable designs, while eliminating unnecessary timing closure efforts and reducing compile times.

Working with early access customers, the Quartus Prime design software demonstrated significantly higher design performance and designer productivity in multiple Arria 10 designs. With the release of the Quartus Prime design software version 15.1, customers targeting Arria 10 designs will experience a full speed-grade advantage on average over the previous software version with the Hybrid Placer and Global Router algorithms. Up to ten times faster IO design is provided with the inclusion of the BluePrint Platform Designer, and the software’s Rapid Recompile feature offers four times faster compile times. Expanded hardware description language support is offered, including SystemVerilog-2005 and VHDL-2008.

Quartus Prime Design Software Licensing Model Quartus Prime design software is offered in three editions based on customers’ design requirements. The Quartus Prime Pro Edition offers the latest performance and productivity tools that support Altera’s latest high-performance FPGAs and SoC FPGAs. The Quartus Prime Standard Edition supports devices in Altera’s new product category and the Quartus Prime Lite Edition support Altera’s high-volume device families. The Pro and Standard editions require an annual software license, while the Lite edition is available as a free download with no license file required.

Access to Altera’s Extensive IP Ecosystem The Quartus Prime design software provides users access to Altera’s extensive collection of intellectual property (IP) cores. Additions and enhancements in the latest software release include four Forward Error Correction (FEC) DSP cores, a 2.5G dynamic rate change option to the low-latency 10G Ethernet MAC and the 1G/2.5G/10G multi-rate Ethernet PHY, as well as improved usability features for external memory interface IP. Dynamically generated and configurable hardware design examples are also included, which simplify IP evaluation on hardware to further improve designer productivity. More information about Altera’s IP solutions can be found at the “what's new in IP” web page.

The Quartus Prime design software is available for download. The Quartus Prime Pro and Standard editions come with the ModelSim-Altera Starter edition software and a full license to the IP Base Suite. The annual software license is $2,995 for a node-locked PC license and is available for purchase at Altera's eStore.


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