Design

Atollic TrueSTUDIO Debug support for HCC eTaskSync Speeds Development

26th April 2013
ES Admin
0
HCC Embedded & Atollic today announced the release of an advanced product that accelerates the debug process for engineers using Atollic’s award-winning TrueSTUDIO C/C++ IDE and HCC’s eTaskSync verifiable task scheduler.
The TrueSTUDIO debugger will provide kernel aware debugging for HCC’s eTaskSync scheduler to give engineers a means to debug embedded systems rapidly.

eTaskSync is an advanced kernel that comes with full MISRA-C:2004 compliance, 100% statement/object code coverage and MC/DC analysis. The new eTaskSync debugger view allows developers using Atollic’s TrueSTUDIO IDE to get valuable insight into the run-time states of the software, making it easier and faster to debug.

Supplied with a fully functional demo application of eTaskSync, Atollic TrueSTUDIO displays the execution status and state of tasks and objects, greatly simplifying the debug and test process.

“Specifically designed for the needs of professional embedded developers, Atollic TrueSTUDIO provides an unrivalled feature-set and unprecedented integration. With the new native kernel aware debug support for the eTaskSync scheduler, engineers get a highly efficient solution for development of systems based on the HCC middleware“ commented Magnus Unemyr, Vice President of Sales and Marketing at Atollic.

“HCC develops software for use in embedded applications that require the most rigorous verification, this kind of cooperation with Atollic makes it easier for engineers to reach their goals” said David Brook, Director of Marketing at HCC Embedded.

The task scheduler debugger support is compatible with all microcontroller devices supported by the IDE, which includes microcontroller devices based on the ARM7, ARM9, Cortex™-M0/M1/M3/M3, Cortex-R4/R5/R7 and Cortex-A5/A7/A8/A9/A15 cores. The task scheduler debugger integration also works in dual-core configurations, using the eTaskSync scheduler in either one or both processor cores, for example in a Freescale Vybrid Cortex-M4/A5 device or an NXP LPC4xxx Cortex-M0/M4 device.

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